Fix incorrect debug prints (reported by Paul Brook).
Remove obsolete / duplicated debug prints and improve output consistency. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3725 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer
parent
69facb7897
commit
6b542af760
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@ -30,7 +30,6 @@
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typedef uint64_t ppc_gpr_t;
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#define TARGET_GPR_BITS 64
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#define TARGET_LONG_BITS 64
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#define REGX "%016" PRIx64
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#define TARGET_PAGE_BITS 12
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#else /* defined (TARGET_PPC64) */
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@ -43,11 +42,9 @@ typedef uint64_t ppc_gpr_t;
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*/
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typedef uint64_t ppc_gpr_t;
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#define TARGET_GPR_BITS 64
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#define REGX "%08" PRIx64
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#else /* (HOST_LONG_BITS >= 64) */
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typedef uint32_t ppc_gpr_t;
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#define TARGET_GPR_BITS 32
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#define REGX "%08" PRIx32
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#endif /* (HOST_LONG_BITS >= 64) */
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#define TARGET_LONG_BITS 32
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@ -74,6 +71,7 @@ typedef uint32_t ppc_gpr_t;
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#include "cpu-defs.h"
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#define REGX "%016" PRIx64
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#define ADDRX TARGET_FMT_lx
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#define PADDRX TARGET_FMT_plx
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@ -792,6 +790,24 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid);
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#endif
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#endif
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static always_inline uint64_t ppc_dump_gpr (CPUPPCState *env, int gprn)
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{
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uint64_t gprv;
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gprv = env->gpr[gprn];
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#if !defined(TARGET_PPC64)
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if (env->flags & POWERPC_FLAG_SPE) {
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/* If the CPU implements the SPE extension, we have to get the
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* high bits of the GPR from the gprh storage area
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*/
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gprv &= 0xFFFFFFFFULL;
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gprv |= (uint64_t)env->gprh[gprn] << 32;
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}
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#endif
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return gprv;
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}
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/* Device control registers */
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int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp);
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int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val);
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@ -37,10 +37,12 @@ register struct CPUPPCState *env asm(AREG0);
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#define T0 (env->t0)
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#define T1 (env->t1)
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#define T2 (env->t2)
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#define TDX "%016" PRIx64
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#else
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register unsigned long T0 asm(AREG1);
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register unsigned long T1 asm(AREG2);
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register unsigned long T2 asm(AREG3);
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#define TDX "%016lx"
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#endif
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/* We may, sometime, need 64 bits registers on 32 bits targets */
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#if (HOST_LONG_BITS == 32)
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@ -31,6 +31,7 @@
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//#define DEBUG_MMU
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//#define DEBUG_BATS
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//#define DEBUG_SLB
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//#define DEBUG_SOFTWARE_TLB
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//#define DUMP_PAGE_TABLES
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//#define DEBUG_EXCEPTIONS
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@ -436,7 +437,7 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
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done:
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#if defined (DEBUG_SOFTWARE_TLB)
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if (loglevel != 0) {
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fprintf(logfile, "found TLB at addr 0x%08lx prot=0x%01x ret=%d\n",
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fprintf(logfile, "found TLB at addr " PADDRX " prot=%01x ret=%d\n",
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ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);
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}
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#endif
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@ -484,8 +485,8 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp,
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bl = (*BATl & 0x0000003F) << 17;
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "b %02x ==> bl %08x msk %08x\n",
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*BATl & 0x0000003F, bl, ~bl);
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fprintf(logfile, "b %02x ==> bl " ADDRX " msk " ADDRX "\n",
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(uint8_t)(*BATl & 0x0000003F), bl, ~bl);
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}
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#endif
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prot = 0;
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@ -513,7 +514,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "%s: %cBAT v 0x" ADDRX "\n", __func__,
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fprintf(logfile, "%s: %cBAT v " ADDRX "\n", __func__,
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type == ACCESS_CODE ? 'I' : 'D', virtual);
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}
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#endif
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@ -527,12 +528,6 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
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BATut = env->DBAT[0];
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break;
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}
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "%s...: %cBAT v 0x" ADDRX "\n", __func__,
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type == ACCESS_CODE ? 'I' : 'D', virtual);
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}
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#endif
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base = virtual & 0xFFFC0000;
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for (i = 0; i < env->nb_BATs; i++) {
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BATu = &BATut[i];
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@ -546,10 +541,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
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}
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX
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" BATl 0x" ADDRX "\n",
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__func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
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*BATu, *BATl);
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fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX
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" BATl " ADDRX "\n", __func__,
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type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl);
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}
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#endif
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if ((virtual & 0xF0000000) == BEPIu &&
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@ -565,8 +559,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
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ret = check_prot(ctx->prot, rw, type);
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#if defined (DEBUG_BATS)
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if (ret == 0 && loglevel != 0) {
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fprintf(logfile, "BAT %d match: r 0x" PADDRX
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" prot=%c%c\n",
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fprintf(logfile, "BAT %d match: r " PADDRX " prot=%c%c\n",
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i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
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ctx->prot & PAGE_WRITE ? 'W' : '-');
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}
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@ -578,16 +571,15 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
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if (ret < 0) {
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "no BAT match for 0x" ADDRX ":\n", virtual);
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fprintf(logfile, "no BAT match for " ADDRX ":\n", virtual);
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for (i = 0; i < 4; i++) {
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BATu = &BATut[i];
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BATl = &BATlt[i];
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BEPIu = *BATu & 0xF0000000;
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BEPIl = *BATu & 0x0FFE0000;
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bl = (*BATu & 0x00001FFC) << 15;
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fprintf(logfile, "%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX
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" BATl 0x" ADDRX " \n\t"
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"0x" ADDRX " 0x" ADDRX " 0x" ADDRX "\n",
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fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX
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" BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
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__func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
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*BATu, *BATl, BEPIu, BEPIl, bl);
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}
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@ -617,8 +609,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
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r = pte64_check(ctx, pte0, pte1, h, rw, type);
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX
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" 0x" ADDRX " %d %d %d 0x" ADDRX "\n",
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fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX
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" %d %d %d " ADDRX "\n",
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base + (i * 16), pte0, pte1,
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(int)(pte0 & 1), h, (int)((pte0 >> 1) & 1),
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ctx->ptem);
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@ -632,8 +624,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
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r = pte32_check(ctx, pte0, pte1, h, rw, type);
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX
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" 0x" ADDRX " %d %d %d 0x" ADDRX "\n",
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fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX
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" %d %d %d " ADDRX "\n",
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base + (i * 8), pte0, pte1,
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(int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1),
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ctx->ptem);
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@ -668,8 +660,7 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
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done:
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "found PTE at addr 0x" PADDRX " prot=0x%01x "
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"ret=%d\n",
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fprintf(logfile, "found PTE at addr " PADDRX " prot=%01x ret=%d\n",
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ctx->raddr, ctx->prot, ret);
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}
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#endif
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@ -884,8 +875,9 @@ void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs)
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tmp64 |= (uint32_t)slb_nr << 28;
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#if defined(DEBUG_SLB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64 " %08"
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PRIx32 "\n", __func__, slb_nr, rs, sr_base, tmp64, tmp);
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fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64
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" %08" PRIx32 "\n", __func__,
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slb_nr, rs, sr_base, tmp64, tmp);
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}
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#endif
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/* Write SLB entry to memory */
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@ -949,9 +941,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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sdr_mask = 0xFFC0;
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "Check segment v=0x" ADDRX " %d 0x" ADDRX
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" nip=0x" ADDRX " lr=0x" ADDRX
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" ir=%d dr=%d pr=%d %d t=%d\n",
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fprintf(logfile, "Check segment v=" ADDRX " %d " ADDRX
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" nip=" ADDRX " lr=" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n",
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eaddr, (int)(eaddr >> 28), sr, env->nip,
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env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0,
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rw, type);
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@ -986,9 +977,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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mask = (htab_mask << sdr_sh) | sdr_mask;
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX " mask "
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PADDRX " " ADDRX "\n", sdr, sdr_sh, hash, mask,
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page_mask);
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fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX
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" mask " PADDRX " " ADDRX "\n",
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sdr, sdr_sh, hash, mask, page_mask);
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}
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#endif
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ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask);
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@ -996,8 +987,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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hash = (~hash) & vsid_mask;
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX " mask "
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PADDRX "\n", sdr, sdr_sh, hash, mask);
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fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX
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" mask " PADDRX "\n",
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sdr, sdr_sh, hash, mask);
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}
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#endif
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ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask);
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@ -1019,10 +1011,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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} else {
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "0 sdr1=0x" PADDRX " vsid=0x%06x "
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"api=0x%04x hash=0x%07x pg_addr=0x" PADDRX "\n",
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sdr, (uint32_t)vsid, (uint32_t)pgidx,
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(uint32_t)hash, ctx->pg_addr[0]);
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fprintf(logfile, "0 sdr1=" PADDRX " vsid=" ADDRX " "
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"api=" ADDRX " hash=" PADDRX
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" pg_addr=" PADDRX "\n",
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sdr, vsid, pgidx, hash, ctx->pg_addr[0]);
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}
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#endif
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/* Primary table lookup */
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@ -1031,11 +1023,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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/* Secondary table lookup */
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#if defined (DEBUG_MMU)
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if (eaddr != 0xEFFFFFFF && loglevel != 0) {
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fprintf(logfile,
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"1 sdr1=0x" PADDRX " vsid=0x%06x api=0x%04x "
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"hash=0x%05x pg_addr=0x" PADDRX "\n",
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sdr, (uint32_t)vsid, (uint32_t)pgidx,
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(uint32_t)hash, ctx->pg_addr[1]);
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fprintf(logfile, "1 sdr1=" PADDRX " vsid=" ADDRX " "
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"api=" ADDRX " hash=" PADDRX
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" pg_addr=" PADDRX "\n",
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sdr, vsid, pgidx, hash, ctx->pg_addr[1]);
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}
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#endif
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ret2 = find_pte(env, ctx, 1, rw, type);
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@ -1047,8 +1038,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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if (loglevel != 0) {
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target_phys_addr_t curaddr;
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uint32_t a0, a1, a2, a3;
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fprintf(logfile,
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"Page table: " PADDRX " len " PADDRX "\n",
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fprintf(logfile, "Page table: " PADDRX " len " PADDRX "\n",
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sdr, mask + 0x80);
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for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
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curaddr += 16) {
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@ -1057,8 +1047,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
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a2 = ldl_phys(curaddr + 8);
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a3 = ldl_phys(curaddr + 12);
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if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
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fprintf(logfile,
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PADDRX ": %08x %08x %08x %08x\n",
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fprintf(logfile, PADDRX ": %08x %08x %08x %08x\n",
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curaddr, a0, a1, a2, a3);
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}
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}
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@ -1135,9 +1124,9 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
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mask = ~(tlb->size - 1);
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#if defined (DEBUG_SOFTWARE_TLB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> "
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ADDRX " " ADDRX " %d\n",
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__func__, i, address, pid, tlb->EPN, mask, (int)tlb->PID);
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fprintf(logfile, "%s: TLB %d address " ADDRX " PID %u <=> " ADDRX
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" " ADDRX " %u\n",
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__func__, i, address, pid, tlb->EPN, mask, (uint32_t)tlb->PID);
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}
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#endif
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/* Check PID */
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@ -1269,7 +1258,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
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ctx->raddr = raddr;
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#if defined (DEBUG_SOFTWARE_TLB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: access granted " ADDRX " => " REGX
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fprintf(logfile, "%s: access granted " ADDRX " => " PADDRX
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" %d %d\n", __func__, address, ctx->raddr, ctx->prot,
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ret);
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}
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@ -1279,7 +1268,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
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}
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#if defined (DEBUG_SOFTWARE_TLB)
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if (loglevel != 0) {
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fprintf(logfile, "%s: access refused " ADDRX " => " REGX
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fprintf(logfile, "%s: access refused " ADDRX " => " PADDRX
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" %d %d\n", __func__, address, raddr, ctx->prot,
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ret);
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}
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@ -1785,7 +1774,7 @@ static always_inline void dump_store_bat (CPUPPCState *env, char ID,
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{
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#if defined (DEBUG_BATS)
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if (loglevel != 0) {
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fprintf(logfile, "Set %cBAT%d%c to 0x" ADDRX " (0x" ADDRX ")\n",
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fprintf(logfile, "Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n",
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ID, nr, ul == 0 ? 'u' : 'l', value, env->nip);
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}
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#endif
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@ -2089,7 +2078,7 @@ void do_store_sdr1 (CPUPPCState *env, target_ulong value)
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{
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#if defined (DEBUG_MMU)
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if (loglevel != 0) {
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fprintf(logfile, "%s: 0x" ADDRX "\n", __func__, value);
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fprintf(logfile, "%s: " ADDRX "\n", __func__, value);
|
||||
}
|
||||
#endif
|
||||
if (env->sdr1 != value) {
|
||||
|
|
@ -2112,7 +2101,7 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value)
|
|||
{
|
||||
#if defined (DEBUG_MMU)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s: reg=%d 0x" ADDRX " " ADDRX "\n",
|
||||
fprintf(logfile, "%s: reg=%d " ADDRX " " ADDRX "\n",
|
||||
__func__, srnum, value, env->sr[srnum]);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -2167,10 +2156,10 @@ void ppc_hw_interrupt (CPUState *env)
|
|||
#else /* defined (CONFIG_USER_ONLY) */
|
||||
static always_inline void dump_syscall (CPUState *env)
|
||||
{
|
||||
fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX
|
||||
" r5=0x" REGX " r6=0x" REGX " nip=0x" ADDRX "\n",
|
||||
env->gpr[0], env->gpr[3], env->gpr[4],
|
||||
env->gpr[5], env->gpr[6], env->nip);
|
||||
fprintf(logfile, "syscall r0=" REGX " r3=" REGX " r4=" REGX
|
||||
" r5=" REGX " r6=" REGX " nip=" ADDRX "\n",
|
||||
ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4),
|
||||
ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip);
|
||||
}
|
||||
|
||||
/* Note that this function should be greatly optimized
|
||||
|
|
@ -2194,7 +2183,7 @@ static always_inline void powerpc_excp (CPUState *env,
|
|||
}
|
||||
|
||||
if (loglevel & CPU_LOG_INT) {
|
||||
fprintf(logfile, "Raise exception at 0x" ADDRX " => 0x%08x (%02x)\n",
|
||||
fprintf(logfile, "Raise exception at " ADDRX " => %08x (%02x)\n",
|
||||
env->nip, excp, env->error_code);
|
||||
}
|
||||
msr = env->msr;
|
||||
|
|
@ -2265,8 +2254,8 @@ static always_inline void powerpc_excp (CPUState *env,
|
|||
case POWERPC_EXCP_DSI: /* Data storage exception */
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX
|
||||
"\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]);
|
||||
fprintf(logfile, "DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n",
|
||||
env->spr[SPR_DSISR], env->spr[SPR_DAR]);
|
||||
}
|
||||
#endif
|
||||
new_msr &= ~((target_ulong)1 << MSR_RI);
|
||||
|
|
@ -2276,8 +2265,8 @@ static always_inline void powerpc_excp (CPUState *env,
|
|||
case POWERPC_EXCP_ISI: /* Instruction storage exception */
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "ISI exception: msr=0x" ADDRX ", nip=0x" ADDRX
|
||||
"\n", msr, env->nip);
|
||||
fprintf(logfile, "ISI exception: msr=" ADDRX ", nip=" ADDRX "\n",
|
||||
msr, env->nip);
|
||||
}
|
||||
#endif
|
||||
new_msr &= ~((target_ulong)1 << MSR_RI);
|
||||
|
|
@ -2322,7 +2311,7 @@ static always_inline void powerpc_excp (CPUState *env,
|
|||
case POWERPC_EXCP_INVAL:
|
||||
#if defined (DEBUG_EXCEPTIONS)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n",
|
||||
fprintf(logfile, "Invalid instruction at " ADDRX "\n",
|
||||
env->nip);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2783,9 +2783,9 @@ void do_load_6xx_tlb (int is_code)
|
|||
way = (env->spr[SPR_SRR1] >> 17) & 1;
|
||||
#if defined (DEBUG_SOFTWARE_TLB)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
||||
__func__, (unsigned long)T0, (unsigned long)EPN,
|
||||
(unsigned long)CMP, (unsigned long)RPN, way);
|
||||
fprintf(logfile, "%s: EPN " TDX " " ADDRX " PTE0 " ADDRX
|
||||
" PTE1 " ADDRX " way %d\n",
|
||||
__func__, T0, EPN, CMP, RPN, way);
|
||||
}
|
||||
#endif
|
||||
/* Store this TLB */
|
||||
|
|
@ -2804,9 +2804,9 @@ void do_load_74xx_tlb (int is_code)
|
|||
way = env->spr[SPR_TLBMISS] & 0x3;
|
||||
#if defined (DEBUG_SOFTWARE_TLB)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
||||
__func__, (unsigned long)T0, (unsigned long)EPN,
|
||||
(unsigned long)CMP, (unsigned long)RPN, way);
|
||||
fprintf(logfile, "%s: EPN " TDX " " ADDRX " PTE0 " ADDRX
|
||||
" PTE1 " ADDRX " way %d\n",
|
||||
__func__, T0, EPN, CMP, RPN, way);
|
||||
}
|
||||
#endif
|
||||
/* Store this TLB */
|
||||
|
|
@ -2920,7 +2920,7 @@ void do_4xx_tlbwe_hi (void)
|
|||
|
||||
#if defined (DEBUG_SOFTWARE_TLB)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1);
|
||||
fprintf(logfile, "%s T0 " TDX " T1 " TDX "\n", __func__, T0, T1);
|
||||
}
|
||||
#endif
|
||||
T0 &= 0x3F;
|
||||
|
|
@ -2989,7 +2989,7 @@ void do_4xx_tlbwe_lo (void)
|
|||
|
||||
#if defined (DEBUG_SOFTWARE_TLB)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1);
|
||||
fprintf(logfile, "%s T0 " TDX " T1 " TDX "\n", __func__, T0, T1);
|
||||
}
|
||||
#endif
|
||||
T0 &= 0x3F;
|
||||
|
|
@ -3022,7 +3022,7 @@ void do_440_tlbwe (int word)
|
|||
|
||||
#if defined (DEBUG_SOFTWARE_TLB)
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "%s word %d T0 " REGX " T1 " REGX "\n",
|
||||
fprintf(logfile, "%s word %d T0 " TDX " T1 " TDX "\n",
|
||||
__func__, word, T0, T1);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -3265,7 +3265,7 @@ static always_inline void gen_op_mfspr (DisasContext *ctx)
|
|||
*/
|
||||
if (sprn != SPR_PVR) {
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "Trying to read privileged spr %d %03x at"
|
||||
fprintf(logfile, "Trying to read privileged spr %d %03x at "
|
||||
ADDRX "\n", sprn, sprn, ctx->nip);
|
||||
}
|
||||
printf("Trying to read privileged spr %d %03x at " ADDRX "\n",
|
||||
|
|
@ -3741,8 +3741,6 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA)
|
|||
GEN_EXCP_PRIVOPC(ctx);
|
||||
#else
|
||||
if (unlikely(!ctx->supervisor)) {
|
||||
if (loglevel != 0)
|
||||
fprintf(logfile, "%s: ! supervisor\n", __func__);
|
||||
GEN_EXCP_PRIVOPC(ctx);
|
||||
return;
|
||||
}
|
||||
|
|
@ -3795,8 +3793,6 @@ GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI)
|
|||
GEN_EXCP_PRIVOPC(ctx);
|
||||
#else
|
||||
if (unlikely(!ctx->supervisor)) {
|
||||
if (loglevel != 0)
|
||||
fprintf(logfile, "%s: ! supervisor\n", __func__);
|
||||
GEN_EXCP_PRIVOPC(ctx);
|
||||
return;
|
||||
}
|
||||
|
|
@ -6060,23 +6056,15 @@ void cpu_dump_state (CPUState *env, FILE *f,
|
|||
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
|
||||
int flags)
|
||||
{
|
||||
#if defined(TARGET_PPC64) || 1
|
||||
#define FILL ""
|
||||
#define RGPL 4
|
||||
#define RFPL 4
|
||||
#else
|
||||
#define FILL " "
|
||||
#define RGPL 8
|
||||
#define RFPL 4
|
||||
#endif
|
||||
|
||||
int i;
|
||||
|
||||
cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " XER %08x\n",
|
||||
env->nip, env->lr, env->ctr, hreg_load_xer(env));
|
||||
cpu_fprintf(f, "MSR " REGX FILL " HID0 " REGX FILL " HF " REGX FILL
|
||||
" idx %d\n",
|
||||
env->msr, env->hflags, env->spr[SPR_HID0], env->mmu_idx);
|
||||
cpu_fprintf(f, "MSR " ADDRX " HID0 " ADDRX " HF " ADDRX " idx %d\n",
|
||||
env->msr, env->spr[SPR_HID0], env->hflags, env->mmu_idx);
|
||||
#if !defined(NO_TIMER_DUMP)
|
||||
cpu_fprintf(f, "TB %08x %08x "
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
|
|
@ -6092,7 +6080,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
|
|||
for (i = 0; i < 32; i++) {
|
||||
if ((i & (RGPL - 1)) == 0)
|
||||
cpu_fprintf(f, "GPR%02d", i);
|
||||
cpu_fprintf(f, " " REGX, (target_ulong)env->gpr[i]);
|
||||
cpu_fprintf(f, " " REGX, ppc_dump_gpr(env, i));
|
||||
if ((i & (RGPL - 1)) == (RGPL - 1))
|
||||
cpu_fprintf(f, "\n");
|
||||
}
|
||||
|
|
@ -6110,7 +6098,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
|
|||
a = 'E';
|
||||
cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
|
||||
}
|
||||
cpu_fprintf(f, " ] " FILL "RES " REGX "\n", env->reserve);
|
||||
cpu_fprintf(f, " ] RES " ADDRX "\n", env->reserve);
|
||||
for (i = 0; i < 32; i++) {
|
||||
if ((i & (RFPL - 1)) == 0)
|
||||
cpu_fprintf(f, "FPR%02d", i);
|
||||
|
|
@ -6119,13 +6107,12 @@ void cpu_dump_state (CPUState *env, FILE *f,
|
|||
cpu_fprintf(f, "\n");
|
||||
}
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX " SDR1 " REGX "\n",
|
||||
cpu_fprintf(f, "SRR0 " ADDRX " SRR1 " ADDRX " SDR1 " ADDRX "\n",
|
||||
env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1);
|
||||
#endif
|
||||
|
||||
#undef RGPL
|
||||
#undef RFPL
|
||||
#undef FILL
|
||||
}
|
||||
|
||||
void cpu_dump_statistics (CPUState *env, FILE*f,
|
||||
|
|
@ -6289,12 +6276,12 @@ static always_inline int gen_intermediate_code_internal (CPUState *env,
|
|||
if (unlikely(handler->handler == &gen_invalid)) {
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "invalid/unsupported opcode: "
|
||||
"%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
|
||||
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
|
||||
opc1(ctx.opcode), opc2(ctx.opcode),
|
||||
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
|
||||
} else {
|
||||
printf("invalid/unsupported opcode: "
|
||||
"%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n",
|
||||
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
|
||||
opc1(ctx.opcode), opc2(ctx.opcode),
|
||||
opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
|
||||
}
|
||||
|
|
@ -6302,13 +6289,13 @@ static always_inline int gen_intermediate_code_internal (CPUState *env,
|
|||
if (unlikely((ctx.opcode & handler->inval) != 0)) {
|
||||
if (loglevel != 0) {
|
||||
fprintf(logfile, "invalid bits: %08x for opcode: "
|
||||
"%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
|
||||
"%02x - %02x - %02x (%08x) " ADDRX "\n",
|
||||
ctx.opcode & handler->inval, opc1(ctx.opcode),
|
||||
opc2(ctx.opcode), opc3(ctx.opcode),
|
||||
ctx.opcode, ctx.nip - 4);
|
||||
} else {
|
||||
printf("invalid bits: %08x for opcode: "
|
||||
"%02x - %02x - %02x (%08x) 0x" ADDRX "\n",
|
||||
"%02x - %02x - %02x (%08x) " ADDRX "\n",
|
||||
ctx.opcode & handler->inval, opc1(ctx.opcode),
|
||||
opc2(ctx.opcode), opc3(ctx.opcode),
|
||||
ctx.opcode, ctx.nip - 4);
|
||||
|
|
|
|||
Loading…
Reference in a new issue