Enable 64bit mode on interrupts
Real 970s enable MSR_SF on all interrupts. The current code didn't do this until now, so let's activate it! Signed-off-by: Alexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6752 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -2612,7 +2612,7 @@ static always_inline void powerpc_excp (CPUState *env,
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new_msr |= (target_ulong)1 << MSR_CM;
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new_msr |= (target_ulong)1 << MSR_CM;
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}
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}
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} else {
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} else {
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if (!msr_isf) {
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if (!msr_isf && !(env->mmu_model & POWERPC_MMU_64)) {
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new_msr &= ~((target_ulong)1 << MSR_SF);
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new_msr &= ~((target_ulong)1 << MSR_SF);
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vector = (uint32_t)vector;
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vector = (uint32_t)vector;
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} else {
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} else {
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@ -2793,6 +2793,10 @@ void cpu_ppc_reset (void *opaque)
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ppc_tlb_invalidate_all(env);
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ppc_tlb_invalidate_all(env);
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#endif
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#endif
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env->msr = msr & env->msr_mask;
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env->msr = msr & env->msr_mask;
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#if defined(TARGET_PPC64)
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if (env->mmu_model & POWERPC_MMU_64)
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env->msr |= (1ULL << MSR_SF);
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#endif
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hreg_compute_hflags(env);
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hreg_compute_hflags(env);
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env->reserve = (target_ulong)-1ULL;
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env->reserve = (target_ulong)-1ULL;
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/* Be sure no exception or interrupt is pending */
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/* Be sure no exception or interrupt is pending */
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