target/mips: Add emulation of DSP ASE for nanoMIPS - part 2
Add emulation of DSP ASE instructions for nanoMIPS - part 2. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
This commit is contained in:
parent
3285a3e444
commit
6d033ca751
|
@ -19316,6 +19316,16 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
|
||||||
case NM_BC1NEZC:
|
case NM_BC1NEZC:
|
||||||
gen_compute_branch_cp1_nm(ctx, OPC_BC1NEZ, rt, s);
|
gen_compute_branch_cp1_nm(ctx, OPC_BC1NEZ, rt, s);
|
||||||
break;
|
break;
|
||||||
|
case NM_BPOSGE32C:
|
||||||
|
check_dspr2(ctx);
|
||||||
|
{
|
||||||
|
int32_t imm = extract32(ctx->opcode, 1, 13) |
|
||||||
|
extract32(ctx->opcode, 0, 1) << 13;
|
||||||
|
|
||||||
|
gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2,
|
||||||
|
imm);
|
||||||
|
}
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
generate_exception_end(ctx, EXCP_RI);
|
generate_exception_end(ctx, EXCP_RI);
|
||||||
break;
|
break;
|
||||||
|
|
Loading…
Reference in a new issue