target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host
Fix the case when the host is a big endian machine, and change the approach toward ST.<B|H|W|D> instruction helpers. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1554212605-16457-3-git-send-email-mateja.marjanovic@rt-rk.com>
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@ -4550,31 +4550,191 @@ static inline void ensure_writable_pages(CPUMIPSState *env,
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#endif
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}
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#define MSA_ST_DF(DF, TYPE, ST_INSN, ...) \
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void helper_msa_st_ ## TYPE(CPUMIPSState *env, uint32_t wd, \
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target_ulong addr) \
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{ \
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
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int mmu_idx = cpu_mmu_index(env, false); \
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int i; \
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MEMOP_IDX(DF) \
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ensure_writable_pages(env, addr, mmu_idx, GETPC()); \
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for (i = 0; i < DF_ELEMENTS(DF); i++) { \
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ST_INSN(env, addr + (i << DF), pwd->TYPE[i], ##__VA_ARGS__); \
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} \
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void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
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target_ulong addr)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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int mmu_idx = cpu_mmu_index(env, false);
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MEMOP_IDX(DF_BYTE)
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ensure_writable_pages(env, addr, mmu_idx, GETPC());
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(HOST_WORDS_BIGENDIAN)
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helper_ret_stb_mmu(env, addr + (0 << DF_BYTE), pwd->b[0], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (1 << DF_BYTE), pwd->b[1], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (2 << DF_BYTE), pwd->b[2], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (3 << DF_BYTE), pwd->b[3], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (4 << DF_BYTE), pwd->b[4], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (5 << DF_BYTE), pwd->b[5], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (6 << DF_BYTE), pwd->b[6], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (7 << DF_BYTE), pwd->b[7], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (8 << DF_BYTE), pwd->b[8], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (9 << DF_BYTE), pwd->b[9], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (10 << DF_BYTE), pwd->b[10], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (11 << DF_BYTE), pwd->b[11], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (12 << DF_BYTE), pwd->b[12], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (13 << DF_BYTE), pwd->b[13], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (14 << DF_BYTE), pwd->b[14], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (15 << DF_BYTE), pwd->b[15], oi, GETPC());
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#else
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helper_ret_stb_mmu(env, addr + (7 << DF_BYTE), pwd->b[0], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (6 << DF_BYTE), pwd->b[1], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (5 << DF_BYTE), pwd->b[2], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (4 << DF_BYTE), pwd->b[3], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (3 << DF_BYTE), pwd->b[4], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (2 << DF_BYTE), pwd->b[5], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (1 << DF_BYTE), pwd->b[6], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (0 << DF_BYTE), pwd->b[7], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (15 << DF_BYTE), pwd->b[8], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (14 << DF_BYTE), pwd->b[9], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (13 << DF_BYTE), pwd->b[10], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (12 << DF_BYTE), pwd->b[11], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (11 << DF_BYTE), pwd->b[12], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (10 << DF_BYTE), pwd->b[13], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (9 << DF_BYTE), pwd->b[14], oi, GETPC());
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helper_ret_stb_mmu(env, addr + (8 << DF_BYTE), pwd->b[15], oi, GETPC());
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#endif
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#else
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#if !defined(HOST_WORDS_BIGENDIAN)
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cpu_stb_data(env, addr + (0 << DF_BYTE), pwd->b[0]);
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cpu_stb_data(env, addr + (1 << DF_BYTE), pwd->b[1]);
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cpu_stb_data(env, addr + (2 << DF_BYTE), pwd->b[2]);
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cpu_stb_data(env, addr + (3 << DF_BYTE), pwd->b[3]);
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cpu_stb_data(env, addr + (4 << DF_BYTE), pwd->b[4]);
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cpu_stb_data(env, addr + (5 << DF_BYTE), pwd->b[5]);
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cpu_stb_data(env, addr + (6 << DF_BYTE), pwd->b[6]);
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cpu_stb_data(env, addr + (7 << DF_BYTE), pwd->b[7]);
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cpu_stb_data(env, addr + (8 << DF_BYTE), pwd->b[8]);
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cpu_stb_data(env, addr + (9 << DF_BYTE), pwd->b[9]);
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cpu_stb_data(env, addr + (10 << DF_BYTE), pwd->b[10]);
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cpu_stb_data(env, addr + (11 << DF_BYTE), pwd->b[11]);
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cpu_stb_data(env, addr + (12 << DF_BYTE), pwd->b[12]);
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cpu_stb_data(env, addr + (13 << DF_BYTE), pwd->b[13]);
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cpu_stb_data(env, addr + (14 << DF_BYTE), pwd->b[14]);
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cpu_stb_data(env, addr + (15 << DF_BYTE), pwd->b[15]);
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#else
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cpu_stb_data(env, addr + (7 << DF_BYTE), pwd->b[0]);
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cpu_stb_data(env, addr + (6 << DF_BYTE), pwd->b[1]);
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cpu_stb_data(env, addr + (5 << DF_BYTE), pwd->b[2]);
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cpu_stb_data(env, addr + (4 << DF_BYTE), pwd->b[3]);
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cpu_stb_data(env, addr + (3 << DF_BYTE), pwd->b[4]);
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cpu_stb_data(env, addr + (2 << DF_BYTE), pwd->b[5]);
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cpu_stb_data(env, addr + (1 << DF_BYTE), pwd->b[6]);
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cpu_stb_data(env, addr + (0 << DF_BYTE), pwd->b[7]);
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cpu_stb_data(env, addr + (15 << DF_BYTE), pwd->b[8]);
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cpu_stb_data(env, addr + (14 << DF_BYTE), pwd->b[9]);
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cpu_stb_data(env, addr + (13 << DF_BYTE), pwd->b[10]);
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cpu_stb_data(env, addr + (12 << DF_BYTE), pwd->b[11]);
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cpu_stb_data(env, addr + (11 << DF_BYTE), pwd->b[12]);
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cpu_stb_data(env, addr + (10 << DF_BYTE), pwd->b[13]);
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cpu_stb_data(env, addr + (9 << DF_BYTE), pwd->b[14]);
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cpu_stb_data(env, addr + (8 << DF_BYTE), pwd->b[15]);
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#endif
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#endif
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}
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void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
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target_ulong addr)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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int mmu_idx = cpu_mmu_index(env, false);
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MEMOP_IDX(DF_HALF)
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ensure_writable_pages(env, addr, mmu_idx, GETPC());
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#if !defined(CONFIG_USER_ONLY)
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MSA_ST_DF(DF_BYTE, b, helper_ret_stb_mmu, oi, GETPC())
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MSA_ST_DF(DF_HALF, h, helper_ret_stw_mmu, oi, GETPC())
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MSA_ST_DF(DF_WORD, w, helper_ret_stl_mmu, oi, GETPC())
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MSA_ST_DF(DF_DOUBLE, d, helper_ret_stq_mmu, oi, GETPC())
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#if !defined(HOST_WORDS_BIGENDIAN)
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helper_ret_stw_mmu(env, addr + (0 << DF_HALF), pwd->h[0], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (1 << DF_HALF), pwd->h[1], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (2 << DF_HALF), pwd->h[2], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (3 << DF_HALF), pwd->h[3], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (4 << DF_HALF), pwd->h[4], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (5 << DF_HALF), pwd->h[5], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (6 << DF_HALF), pwd->h[6], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (7 << DF_HALF), pwd->h[7], oi, GETPC());
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#else
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MSA_ST_DF(DF_BYTE, b, cpu_stb_data)
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MSA_ST_DF(DF_HALF, h, cpu_stw_data)
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MSA_ST_DF(DF_WORD, w, cpu_stl_data)
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MSA_ST_DF(DF_DOUBLE, d, cpu_stq_data)
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helper_ret_stw_mmu(env, addr + (3 << DF_HALF), pwd->h[0], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (2 << DF_HALF), pwd->h[1], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (1 << DF_HALF), pwd->h[2], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (0 << DF_HALF), pwd->h[3], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (7 << DF_HALF), pwd->h[4], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (6 << DF_HALF), pwd->h[5], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (5 << DF_HALF), pwd->h[6], oi, GETPC());
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helper_ret_stw_mmu(env, addr + (4 << DF_HALF), pwd->h[7], oi, GETPC());
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#endif
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#else
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#if !defined(HOST_WORDS_BIGENDIAN)
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cpu_stw_data(env, addr + (0 << DF_HALF), pwd->h[0]);
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cpu_stw_data(env, addr + (1 << DF_HALF), pwd->h[1]);
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cpu_stw_data(env, addr + (2 << DF_HALF), pwd->h[2]);
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cpu_stw_data(env, addr + (3 << DF_HALF), pwd->h[3]);
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cpu_stw_data(env, addr + (4 << DF_HALF), pwd->h[4]);
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cpu_stw_data(env, addr + (5 << DF_HALF), pwd->h[5]);
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cpu_stw_data(env, addr + (6 << DF_HALF), pwd->h[6]);
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cpu_stw_data(env, addr + (7 << DF_HALF), pwd->h[7]);
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#else
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cpu_stw_data(env, addr + (3 << DF_HALF), pwd->h[0]);
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cpu_stw_data(env, addr + (2 << DF_HALF), pwd->h[1]);
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cpu_stw_data(env, addr + (1 << DF_HALF), pwd->h[2]);
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cpu_stw_data(env, addr + (0 << DF_HALF), pwd->h[3]);
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cpu_stw_data(env, addr + (7 << DF_HALF), pwd->h[4]);
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cpu_stw_data(env, addr + (6 << DF_HALF), pwd->h[5]);
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cpu_stw_data(env, addr + (5 << DF_HALF), pwd->h[6]);
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cpu_stw_data(env, addr + (4 << DF_HALF), pwd->h[7]);
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#endif
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#endif
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}
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void helper_msa_st_w(CPUMIPSState *env, uint32_t wd,
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target_ulong addr)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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int mmu_idx = cpu_mmu_index(env, false);
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MEMOP_IDX(DF_WORD)
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ensure_writable_pages(env, addr, mmu_idx, GETPC());
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(HOST_WORDS_BIGENDIAN)
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helper_ret_stl_mmu(env, addr + (0 << DF_WORD), oi, GETPC(), pwd->w[0]);
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helper_ret_stl_mmu(env, addr + (1 << DF_WORD), oi, GETPC(), pwd->w[1]);
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helper_ret_stl_mmu(env, addr + (2 << DF_WORD), oi, GETPC(), pwd->w[2]);
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helper_ret_stl_mmu(env, addr + (3 << DF_WORD), oi, GETPC(), pwd->w[3]);
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#else
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helper_ret_stl_mmu(env, addr + (1 << DF_WORD), oi, GETPC(), pwd->w[0]);
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helper_ret_stl_mmu(env, addr + (0 << DF_WORD), oi, GETPC(), pwd->w[1]);
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helper_ret_stl_mmu(env, addr + (3 << DF_WORD), oi, GETPC(), pwd->w[2]);
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helper_ret_stl_mmu(env, addr + (2 << DF_WORD), oi, GETPC(), pwd->w[3]);
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#endif
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#else
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#if !defined(HOST_WORDS_BIGENDIAN)
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cpu_stl_data(env, addr + (0 << DF_WORD), pwd->w[0]);
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cpu_stl_data(env, addr + (1 << DF_WORD), pwd->w[1]);
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cpu_stl_data(env, addr + (2 << DF_WORD), pwd->w[2]);
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cpu_stl_data(env, addr + (3 << DF_WORD), pwd->w[3]);
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#else
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cpu_stl_data(env, addr + (1 << DF_WORD), pwd->w[0]);
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cpu_stl_data(env, addr + (0 << DF_WORD), pwd->w[1]);
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cpu_stl_data(env, addr + (3 << DF_WORD), pwd->w[2]);
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cpu_stl_data(env, addr + (2 << DF_WORD), pwd->w[3]);
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#endif
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#endif
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}
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void helper_msa_st_d(CPUMIPSState *env, uint32_t wd,
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target_ulong addr)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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int mmu_idx = cpu_mmu_index(env, false);
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MEMOP_IDX(DF_DOUBLE)
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ensure_writable_pages(env, addr, mmu_idx, GETPC());
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#if !defined(CONFIG_USER_ONLY)
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helper_ret_stq_mmu(env, addr + (0 << DF_DOUBLE), pwd->d[0], oi, GETPC());
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helper_ret_stq_mmu(env, addr + (1 << DF_DOUBLE), pwd->d[1], oi, GETPC());
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#else
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cpu_stq_data(env, addr + (0 << DF_DOUBLE), pwd->d[0]);
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cpu_stq_data(env, addr + (1 << DF_DOUBLE), pwd->d[1]);
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#endif
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}
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void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op)
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{
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