target/arm: Remove a handful of stray tabs
Following the bulk conversion of the iwMMXt code, there are just a handful of hard coded tabs in target/arm; fix them. This is a whitespace-only patch. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180821165215.29069-4-peter.maydell@linaro.org
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@ -136,7 +136,7 @@ static void arm_semi_cb(CPUState *cs, target_ulong ret, target_ulong err)
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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ts->swi_errno = err;
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ts->swi_errno = err;
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#else
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#else
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syscall_err = err;
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syscall_err = err;
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#endif
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#endif
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reg0 = ret;
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reg0 = ret;
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} else {
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} else {
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@ -1320,14 +1320,14 @@ enum arm_cpu_mode {
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#define ARM_VFP_FPINST2 10
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#define ARM_VFP_FPINST2 10
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/* iwMMXt coprocessor control registers. */
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/* iwMMXt coprocessor control registers. */
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#define ARM_IWMMXT_wCID 0
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#define ARM_IWMMXT_wCID 0
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#define ARM_IWMMXT_wCon 1
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#define ARM_IWMMXT_wCon 1
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#define ARM_IWMMXT_wCSSF 2
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#define ARM_IWMMXT_wCSSF 2
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#define ARM_IWMMXT_wCASF 3
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#define ARM_IWMMXT_wCASF 3
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#define ARM_IWMMXT_wCGR0 8
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#define ARM_IWMMXT_wCGR0 8
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#define ARM_IWMMXT_wCGR1 9
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#define ARM_IWMMXT_wCGR1 9
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#define ARM_IWMMXT_wCGR2 10
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#define ARM_IWMMXT_wCGR2 10
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#define ARM_IWMMXT_wCGR3 11
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#define ARM_IWMMXT_wCGR3 11
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/* V7M CCR bits */
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/* V7M CCR bits */
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FIELD(V7M_CCR, NONBASETHRDENA, 0, 1)
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FIELD(V7M_CCR, NONBASETHRDENA, 0, 1)
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