From 889912999d3f089cb8b6db8763ebec11022768b9 Mon Sep 17 00:00:00 2001 From: Dongxue Zhang Date: Wed, 25 Nov 2015 20:57:12 +0800 Subject: [PATCH 1/4] target-mips/cpu.h: Fix spell error CP0IntCtl_IPPC1, the last letter should be 'i', not 'one'. Signed-off-by: Dongxue Zhang Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 89c01f7a38..17817c3c57 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -358,7 +358,7 @@ struct CPUMIPSState { #define CP0St_IE 0 int32_t CP0_IntCtl; #define CP0IntCtl_IPTI 29 -#define CP0IntCtl_IPPC1 26 +#define CP0IntCtl_IPPCI 26 #define CP0IntCtl_VS 5 int32_t CP0_SRSCtl; #define CP0SRSCtl_HSS 26 From 1aa56f6ee7d2375b0734e98ba69cc41416894bbc Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Sun, 6 Dec 2015 17:11:49 +0100 Subject: [PATCH 2/4] target-mips: silence NaNs for cvt.s.d and cvt.d.s cvt.s.d and cvt.d.s are FP operations and thus need to convert input sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan functions for that as the floatXX_to_floatXX functions do not do that. Cc: Leon Alrae Signed-off-by: Aurelien Jarno Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/op_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index d2c98c9688..20e79bee23 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -2545,6 +2545,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) uint64_t fdt2; fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status); + fdt2 = float64_maybe_silence_nan(fdt2); update_fcr31(env, GETPC()); return fdt2; } @@ -2634,6 +2635,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0) uint32_t fst2; fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status); + fst2 = float32_maybe_silence_nan(fst2); update_fcr31(env, GETPC()); return fst2; } From 51243852af322f0a1103a90c936c43db84def82f Mon Sep 17 00:00:00 2001 From: Miodrag Dinic Date: Thu, 3 Dec 2015 16:48:57 +0100 Subject: [PATCH 3/4] target-mips: Fix ALIGN instruction when bp=0 If executing ALIGN with shift count bp=0 within mips64 emulation, the result of the operation should be sign extended. Taken from the official documentation (pseudo code) : ALIGN: tmp_rt_hi = unsigned_word(GPR[rt]) << (8*bp) tmp_rs_lo = unsigned_word(GPR[rs]) >> (8*(4-bp)) tmp = tmp_rt_hi || tmp_rt_lo GPR[rd] = sign_extend.32(tmp) Signed-off-by: Miodrag Dinic Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/translate.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 56266471c1..d2443d382a 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -4630,7 +4630,16 @@ static void gen_align(DisasContext *ctx, int opc, int rd, int rs, int rt, t0 = tcg_temp_new(); gen_load_gpr(t0, rt); if (bp == 0) { - tcg_gen_mov_tl(cpu_gpr[rd], t0); + switch (opc) { + case OPC_ALIGN: + tcg_gen_ext32s_tl(cpu_gpr[rd], t0); + break; +#if defined(TARGET_MIPS64) + case OPC_DALIGN: + tcg_gen_mov_tl(cpu_gpr[rd], t0); + break; +#endif + } } else { TCGv t1 = tcg_temp_new(); gen_load_gpr(t1, rs); From c684822ad29968af09735148f03a511bc514589d Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 18 Jan 2016 17:35:00 +0000 Subject: [PATCH 4/4] mips: Clean up includes Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- disas/mips.c | 1 + hw/mips/addr.c | 1 + hw/mips/cputimer.c | 1 + hw/mips/gt64xxx_pci.c | 1 + hw/mips/mips_fulong2e.c | 1 + hw/mips/mips_int.c | 1 + hw/mips/mips_jazz.c | 1 + hw/mips/mips_malta.c | 1 + hw/mips/mips_mipssim.c | 1 + hw/mips/mips_r4k.c | 1 + target-mips/cpu.c | 1 + target-mips/dsp_helper.c | 1 + target-mips/gdbstub.c | 2 +- target-mips/helper.c | 6 +----- target-mips/kvm.c | 2 +- target-mips/lmi_helper.c | 1 + target-mips/machine.c | 1 + target-mips/mips-semi.c | 2 +- target-mips/msa_helper.c | 1 + target-mips/op_helper.c | 2 +- target-mips/translate.c | 1 + 21 files changed, 21 insertions(+), 9 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index bf0bbaf86a..0e488d8578 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -19,6 +19,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, see . */ +#include "qemu/osdep.h" #include "disas/bfd.h" /* mips.h. Mips opcode list for GDB, the GNU debugger. diff --git a/hw/mips/addr.c b/hw/mips/addr.c index ff3b952600..e4e86b4a75 100644 --- a/hw/mips/addr.c +++ b/hw/mips/addr.c @@ -20,6 +20,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/cpudevs.h" diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c index f046588ada..efb227d06e 100644 --- a/hw/mips/cputimer.c +++ b/hw/mips/cputimer.c @@ -20,6 +20,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/cpudevs.h" #include "qemu/timer.h" diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index c1f3c9c3e9..3f4523df22 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/pci/pci.h" diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 5988a88c0b..6748d89478 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -18,6 +18,7 @@ * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/char/serial.h" diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index d740046ba1..59081f9d1e 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -20,6 +20,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/cpudevs.h" #include "cpu.h" diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 1cfbaa605a..62527fdbe8 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/mips/cpudevs.h" diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 91c36baa55..c5da83fde8 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/char/serial.h" diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 23b35bea21..8951ae97d3 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -24,6 +24,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/mips/cpudevs.h" diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index 2d4e038673..b6625aeee4 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -7,6 +7,7 @@ * All peripherial devices are attached to this "bus" with * the standard PC ISA addresses. */ +#include "qemu/osdep.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/mips/cpudevs.h" diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 639a24b362..0b3f130cf2 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -18,6 +18,7 @@ * */ +#include "qemu/osdep.h" #include "cpu.h" #include "kvm_mips.h" #include "qemu-common.h" diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index 46528de325..df7d2204b0 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see . */ +#include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/bitops.h" diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c index 9845d880ae..b0b4a32ec0 100644 --- a/target-mips/gdbstub.c +++ b/target-mips/gdbstub.c @@ -17,7 +17,7 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#include "config.h" +#include "qemu/osdep.h" #include "qemu-common.h" #include "exec/gdbstub.h" diff --git a/target-mips/helper.c b/target-mips/helper.c index 118072a9e7..f9c4c11eb9 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -16,11 +16,7 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#include -#include -#include -#include -#include +#include "qemu/osdep.h" #include "cpu.h" #include "sysemu/kvm.h" diff --git a/target-mips/kvm.c b/target-mips/kvm.c index ffc120d716..a8b8b32c26 100644 --- a/target-mips/kvm.c +++ b/target-mips/kvm.c @@ -9,7 +9,7 @@ * Authors: Sanjay Lal */ -#include +#include "qemu/osdep.h" #include #include diff --git a/target-mips/lmi_helper.c b/target-mips/lmi_helper.c index bbfcd59cdb..fb1245b39d 100644 --- a/target-mips/lmi_helper.c +++ b/target-mips/lmi_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see . */ +#include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" diff --git a/target-mips/machine.c b/target-mips/machine.c index b15c43a107..737f3c2f58 100644 --- a/target-mips/machine.c +++ b/target-mips/machine.c @@ -1,3 +1,4 @@ +#include "qemu/osdep.h" #include "hw/hw.h" #include "cpu.h" diff --git a/target-mips/mips-semi.c b/target-mips/mips-semi.c index 5050940c20..ed235de99d 100644 --- a/target-mips/mips-semi.c +++ b/target-mips/mips-semi.c @@ -17,7 +17,7 @@ * License along with this library; if not, see . */ -#include +#include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" #include "exec/softmmu-semi.h" diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c index b8e2917e5e..654a0d2728 100644 --- a/target-mips/msa_helper.c +++ b/target-mips/msa_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see . */ +#include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 20e79bee23..684ec92c12 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -16,7 +16,7 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#include +#include "qemu/osdep.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" diff --git a/target-mips/translate.c b/target-mips/translate.c index d2443d382a..383d4b5118 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -21,6 +21,7 @@ * License along with this library; if not, see . */ +#include "qemu/osdep.h" #include "cpu.h" #include "disas/disas.h" #include "tcg-op.h"