sparc64: add macros to deal with softint and timer interrupt
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -73,7 +73,6 @@
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#define MAX_PILS 16
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#define MAX_PILS 16
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#define TICK_INT_DIS 0x8000000000000000ULL
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#define TICK_MAX 0x7fffffffffffffffULL
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#define TICK_MAX 0x7fffffffffffffffULL
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struct hwdef {
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struct hwdef {
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@ -394,6 +394,8 @@ typedef struct CPUSPARCState {
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uint64_t fprs;
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uint64_t fprs;
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uint64_t tick_cmpr, stick_cmpr;
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uint64_t tick_cmpr, stick_cmpr;
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void *tick, *stick;
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void *tick, *stick;
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#define TICK_NPT_MASK 0x8000000000000000ULL
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#define TICK_INT_DIS 0x8000000000000000ULL
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uint64_t gsr;
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uint64_t gsr;
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uint32_t gl; // UA2005
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uint32_t gl; // UA2005
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/* UA 2005 hyperprivileged registers */
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/* UA 2005 hyperprivileged registers */
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@ -402,6 +404,8 @@ typedef struct CPUSPARCState {
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uint32_t softint;
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uint32_t softint;
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#define SOFTINT_TIMER 1
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#define SOFTINT_TIMER 1
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#define SOFTINT_STIMER (1 << 16)
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#define SOFTINT_STIMER (1 << 16)
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#define SOFTINT_INTRMASK (0xFFFE)
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#define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_TIMER)
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#endif
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#endif
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sparc_def_t *def;
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sparc_def_t *def;
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} CPUSPARCState;
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} CPUSPARCState;
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