musicpal: Reorganize IO memory handling (Jan Kiszka)
The new MMIO interface requires non-overlapping slots. Reorganize the musicpal accordingly, fixing a regression for the Ethernet emulation. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6803 c046a42c-6fe2-441c-8c8c-71466251a162
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43e860ef09
commit
718ec0be53
189
hw/musicpal.c
189
hw/musicpal.c
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@ -20,12 +20,21 @@
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#include "audio/audio.h"
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#include "i2c.h"
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#define MP_MISC_BASE 0x80002000
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#define MP_MISC_SIZE 0x00001000
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#define MP_ETH_BASE 0x80008000
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#define MP_ETH_SIZE 0x00001000
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#define MP_WLAN_BASE 0x8000C000
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#define MP_WLAN_SIZE 0x00000800
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#define MP_UART1_BASE 0x8000C840
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#define MP_UART2_BASE 0x8000C940
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#define MP_GPIO_BASE 0x8000D000
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#define MP_GPIO_SIZE 0x00001000
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#define MP_FLASHCFG_BASE 0x90006000
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#define MP_FLASHCFG_SIZE 0x00001000
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@ -429,7 +438,7 @@ static CPUWriteMemoryFunc *musicpal_audio_writefn[] = {
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musicpal_audio_write
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};
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static i2c_interface *musicpal_audio_init(uint32_t base, qemu_irq irq)
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static i2c_interface *musicpal_audio_init(qemu_irq irq)
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{
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AudioState *audio;
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musicpal_audio_state *s;
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@ -457,14 +466,14 @@ static i2c_interface *musicpal_audio_init(uint32_t base, qemu_irq irq)
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iomemtype = cpu_register_io_memory(0, musicpal_audio_readfn,
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musicpal_audio_writefn, s);
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cpu_register_physical_memory(base, MP_AUDIO_SIZE, iomemtype);
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cpu_register_physical_memory(MP_AUDIO_BASE, MP_AUDIO_SIZE, iomemtype);
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qemu_register_reset(musicpal_audio_reset, s);
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return i2c;
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}
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#else /* !HAS_AUDIO */
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static i2c_interface *musicpal_audio_init(uint32_t base, qemu_irq irq)
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static i2c_interface *musicpal_audio_init(qemu_irq irq)
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{
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return NULL;
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}
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@ -899,7 +908,7 @@ static CPUWriteMemoryFunc *musicpal_lcd_writefn[] = {
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musicpal_lcd_write
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};
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static void musicpal_lcd_init(uint32_t base)
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static void musicpal_lcd_init(void)
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{
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musicpal_lcd_state *s;
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int iomemtype;
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@ -907,7 +916,7 @@ static void musicpal_lcd_init(uint32_t base)
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s = qemu_mallocz(sizeof(musicpal_lcd_state));
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iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn,
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musicpal_lcd_writefn, s);
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cpu_register_physical_memory(base, MP_LCD_SIZE, iomemtype);
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cpu_register_physical_memory(MP_LCD_BASE, MP_LCD_SIZE, iomemtype);
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s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
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NULL, NULL, s);
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@ -1195,20 +1204,102 @@ static void mv88w8618_flashcfg_init(uint32_t base)
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cpu_register_physical_memory(base, MP_FLASHCFG_SIZE, iomemtype);
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}
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/* Various registers in the 0x80000000 domain */
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#define MP_BOARD_REVISION 0x2018
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/* Misc register offsets */
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#define MP_MISC_BOARD_REVISION 0x18
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#define MP_WLAN_MAGIC1 0xc11c
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#define MP_WLAN_MAGIC2 0xc124
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#define MP_BOARD_REVISION 0x31
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#define MP_GPIO_OE_LO 0xd008
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#define MP_GPIO_OUT_LO 0xd00c
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#define MP_GPIO_IN_LO 0xd010
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#define MP_GPIO_ISR_LO 0xd020
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#define MP_GPIO_OE_HI 0xd508
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#define MP_GPIO_OUT_HI 0xd50c
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#define MP_GPIO_IN_HI 0xd510
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#define MP_GPIO_ISR_HI 0xd520
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static uint32_t musicpal_misc_read(void *opaque, target_phys_addr_t offset)
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{
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switch (offset) {
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case MP_MISC_BOARD_REVISION:
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return MP_BOARD_REVISION;
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default:
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return 0;
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}
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}
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static void musicpal_misc_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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{
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}
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static CPUReadMemoryFunc *musicpal_misc_readfn[] = {
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musicpal_misc_read,
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musicpal_misc_read,
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musicpal_misc_read,
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};
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static CPUWriteMemoryFunc *musicpal_misc_writefn[] = {
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musicpal_misc_write,
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musicpal_misc_write,
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musicpal_misc_write,
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};
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static void musicpal_misc_init(void)
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{
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int iomemtype;
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iomemtype = cpu_register_io_memory(0, musicpal_misc_readfn,
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musicpal_misc_writefn, NULL);
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cpu_register_physical_memory(MP_MISC_BASE, MP_MISC_SIZE, iomemtype);
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}
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/* WLAN register offsets */
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#define MP_WLAN_MAGIC1 0x11c
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#define MP_WLAN_MAGIC2 0x124
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static uint32_t mv88w8618_wlan_read(void *opaque, target_phys_addr_t offset)
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{
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switch (offset) {
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/* Workaround to allow loading the binary-only wlandrv.ko crap
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* from the original Freecom firmware. */
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case MP_WLAN_MAGIC1:
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return ~3;
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case MP_WLAN_MAGIC2:
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return -1;
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default:
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return 0;
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}
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}
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static void mv88w8618_wlan_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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{
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}
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static CPUReadMemoryFunc *mv88w8618_wlan_readfn[] = {
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mv88w8618_wlan_read,
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mv88w8618_wlan_read,
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mv88w8618_wlan_read,
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};
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static CPUWriteMemoryFunc *mv88w8618_wlan_writefn[] = {
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mv88w8618_wlan_write,
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mv88w8618_wlan_write,
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mv88w8618_wlan_write,
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};
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static void mv88w8618_wlan_init(uint32_t base)
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{
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int iomemtype;
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iomemtype = cpu_register_io_memory(0, mv88w8618_wlan_readfn,
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mv88w8618_wlan_writefn, NULL);
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cpu_register_physical_memory(base, MP_WLAN_SIZE, iomemtype);
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}
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/* GPIO register offsets */
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#define MP_GPIO_OE_LO 0x008
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#define MP_GPIO_OUT_LO 0x00c
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#define MP_GPIO_IN_LO 0x010
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#define MP_GPIO_ISR_LO 0x020
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#define MP_GPIO_OE_HI 0x508
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#define MP_GPIO_OUT_HI 0x50c
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#define MP_GPIO_IN_HI 0x510
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#define MP_GPIO_ISR_HI 0x520
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/* GPIO bits & masks */
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#define MP_GPIO_WHEEL_VOL (1 << 8)
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@ -1227,12 +1318,9 @@ static void mv88w8618_flashcfg_init(uint32_t base)
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/* LCD brightness bits in GPIO_OE_HI */
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#define MP_OE_LCD_BRIGHTNESS 0x0007
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static uint32_t musicpal_read(void *opaque, target_phys_addr_t offset)
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static uint32_t musicpal_gpio_read(void *opaque, target_phys_addr_t offset)
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{
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switch (offset) {
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case MP_BOARD_REVISION:
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return 0x0031;
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case MP_GPIO_OE_HI: /* used for LCD brightness control */
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return lcd_brightness & MP_OE_LCD_BRIGHTNESS;
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@ -1254,20 +1342,13 @@ static uint32_t musicpal_read(void *opaque, target_phys_addr_t offset)
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case MP_GPIO_ISR_HI:
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return gpio_isr >> 16;
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/* Workaround to allow loading the binary-only wlandrv.ko crap
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* from the original Freecom firmware. */
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case MP_WLAN_MAGIC1:
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return ~3;
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case MP_WLAN_MAGIC2:
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return -1;
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default:
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return 0;
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}
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}
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static void musicpal_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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static void musicpal_gpio_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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{
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switch (offset) {
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case MP_GPIO_OE_HI: /* used for LCD brightness control */
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@ -1290,6 +1371,27 @@ static void musicpal_write(void *opaque, target_phys_addr_t offset,
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}
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}
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static CPUReadMemoryFunc *musicpal_gpio_readfn[] = {
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musicpal_gpio_read,
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musicpal_gpio_read,
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musicpal_gpio_read,
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};
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static CPUWriteMemoryFunc *musicpal_gpio_writefn[] = {
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musicpal_gpio_write,
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musicpal_gpio_write,
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musicpal_gpio_write,
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};
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static void musicpal_gpio_init(void)
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{
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int iomemtype;
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iomemtype = cpu_register_io_memory(0, musicpal_gpio_readfn,
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musicpal_gpio_writefn, NULL);
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cpu_register_physical_memory(MP_GPIO_BASE, MP_GPIO_SIZE, iomemtype);
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}
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/* Keyboard codes & masks */
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#define KEY_RELEASED 0x80
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#define KEY_CODE 0x7f
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kbd_extended = 0;
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}
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static CPUReadMemoryFunc *musicpal_readfn[] = {
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musicpal_read,
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musicpal_read,
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musicpal_read,
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};
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static CPUWriteMemoryFunc *musicpal_writefn[] = {
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musicpal_write,
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musicpal_write,
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musicpal_write,
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};
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static struct arm_boot_info musicpal_binfo = {
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.loader_start = 0x0,
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.board_id = 0x20e,
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@ -1395,7 +1485,6 @@ static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
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CPUState *env;
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qemu_irq *pic;
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int index;
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int iomemtype;
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unsigned long flash_size;
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if (!cpu_model)
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@ -1415,11 +1504,6 @@ static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
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sram_off = qemu_ram_alloc(MP_SRAM_SIZE);
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cpu_register_physical_memory(MP_SRAM_BASE, MP_SRAM_SIZE, sram_off);
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/* Catch various stuff not handled by separate subsystems */
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iomemtype = cpu_register_io_memory(0, musicpal_readfn,
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musicpal_writefn, env);
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cpu_register_physical_memory(0x80000000, 0x10000, iomemtype);
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pic = mv88w8618_pic_init(MP_PIC_BASE, pic[ARM_PIC_CPU_IRQ]);
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mv88w8618_pit_init(MP_PIT_BASE, pic, MP_TIMER1_IRQ);
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}
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mv88w8618_flashcfg_init(MP_FLASHCFG_BASE);
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musicpal_lcd_init(MP_LCD_BASE);
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musicpal_lcd_init();
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qemu_add_kbd_event_handler(musicpal_key_event, pic[MP_GPIO_IRQ]);
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mv88w8618_eth_init(&nd_table[0], MP_ETH_BASE, pic[MP_ETH_IRQ]);
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mixer_i2c = musicpal_audio_init(MP_AUDIO_BASE, pic[MP_AUDIO_IRQ]);
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mixer_i2c = musicpal_audio_init(pic[MP_AUDIO_IRQ]);
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mv88w8618_wlan_init(MP_WLAN_BASE);
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musicpal_misc_init();
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musicpal_gpio_init();
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musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE;
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musicpal_binfo.kernel_filename = kernel_filename;
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