scsi/lsi53c895a: QOM parent field cleanup
Replace direct uses of LSIState::dev with QOM casts and rename it to parent_obj. Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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71186c867c
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725eec7043
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@ -184,7 +184,10 @@ typedef struct lsi_request {
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} lsi_request;
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} lsi_request;
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typedef struct {
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typedef struct {
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PCIDevice dev;
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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MemoryRegion mmio_io;
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MemoryRegion mmio_io;
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MemoryRegion ram_io;
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MemoryRegion ram_io;
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MemoryRegion io_io;
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MemoryRegion io_io;
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@ -387,7 +390,7 @@ static inline uint32_t read_dword(LSIState *s, uint32_t addr)
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{
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{
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uint32_t buf;
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uint32_t buf;
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pci_dma_read(&s->dev, addr, &buf, 4);
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pci_dma_read(PCI_DEVICE(s), addr, &buf, 4);
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return cpu_to_le32(buf);
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return cpu_to_le32(buf);
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}
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}
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@ -398,6 +401,7 @@ static void lsi_stop_script(LSIState *s)
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static void lsi_update_irq(LSIState *s)
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static void lsi_update_irq(LSIState *s)
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{
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{
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PCIDevice *d = PCI_DEVICE(s);
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int level;
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int level;
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static int last_level;
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static int last_level;
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lsi_request *p;
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lsi_request *p;
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@ -429,7 +433,7 @@ static void lsi_update_irq(LSIState *s)
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level, s->dstat, s->sist1, s->sist0);
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level, s->dstat, s->sist1, s->sist0);
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last_level = level;
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last_level = level;
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}
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}
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qemu_set_irq(s->dev.irq[0], level);
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qemu_set_irq(d->irq[0], level);
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if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
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if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
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DPRINTF("Handled IRQs & disconnected, looking for pending "
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DPRINTF("Handled IRQs & disconnected, looking for pending "
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@ -525,6 +529,7 @@ static void lsi_bad_selection(LSIState *s, uint32_t id)
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/* Initiate a SCSI layer data transfer. */
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/* Initiate a SCSI layer data transfer. */
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static void lsi_do_dma(LSIState *s, int out)
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static void lsi_do_dma(LSIState *s, int out)
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{
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{
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PCIDevice *pci_dev;
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uint32_t count;
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uint32_t count;
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dma_addr_t addr;
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dma_addr_t addr;
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SCSIDevice *dev;
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SCSIDevice *dev;
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@ -536,6 +541,7 @@ static void lsi_do_dma(LSIState *s, int out)
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return;
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return;
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}
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}
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pci_dev = PCI_DEVICE(s);
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dev = s->current->req->dev;
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dev = s->current->req->dev;
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assert(dev);
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assert(dev);
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@ -561,9 +567,9 @@ static void lsi_do_dma(LSIState *s, int out)
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}
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}
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/* ??? Set SFBR to first data byte. */
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/* ??? Set SFBR to first data byte. */
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if (out) {
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if (out) {
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pci_dma_read(&s->dev, addr, s->current->dma_buf, count);
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pci_dma_read(pci_dev, addr, s->current->dma_buf, count);
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} else {
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} else {
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pci_dma_write(&s->dev, addr, s->current->dma_buf, count);
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pci_dma_write(pci_dev, addr, s->current->dma_buf, count);
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}
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}
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s->current->dma_len -= count;
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s->current->dma_len -= count;
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if (s->current->dma_len == 0) {
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if (s->current->dma_len == 0) {
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@ -758,7 +764,7 @@ static void lsi_do_command(LSIState *s)
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DPRINTF("Send command len=%d\n", s->dbc);
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DPRINTF("Send command len=%d\n", s->dbc);
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if (s->dbc > 16)
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if (s->dbc > 16)
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s->dbc = 16;
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s->dbc = 16;
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pci_dma_read(&s->dev, s->dnad, buf, s->dbc);
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pci_dma_read(PCI_DEVICE(s), s->dnad, buf, s->dbc);
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s->sfbr = buf[0];
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s->sfbr = buf[0];
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s->command_complete = 0;
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s->command_complete = 0;
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@ -809,7 +815,7 @@ static void lsi_do_status(LSIState *s)
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s->dbc = 1;
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s->dbc = 1;
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status = s->status;
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status = s->status;
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s->sfbr = status;
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s->sfbr = status;
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pci_dma_write(&s->dev, s->dnad, &status, 1);
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pci_dma_write(PCI_DEVICE(s), s->dnad, &status, 1);
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lsi_set_phase(s, PHASE_MI);
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lsi_set_phase(s, PHASE_MI);
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s->msg_action = 1;
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s->msg_action = 1;
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lsi_add_msg_byte(s, 0); /* COMMAND COMPLETE */
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lsi_add_msg_byte(s, 0); /* COMMAND COMPLETE */
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@ -823,7 +829,7 @@ static void lsi_do_msgin(LSIState *s)
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len = s->msg_len;
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len = s->msg_len;
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if (len > s->dbc)
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if (len > s->dbc)
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len = s->dbc;
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len = s->dbc;
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pci_dma_write(&s->dev, s->dnad, s->msg, len);
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pci_dma_write(PCI_DEVICE(s), s->dnad, s->msg, len);
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/* Linux drivers rely on the last byte being in the SIDL. */
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/* Linux drivers rely on the last byte being in the SIDL. */
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s->sidl = s->msg[len - 1];
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s->sidl = s->msg[len - 1];
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s->msg_len -= len;
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s->msg_len -= len;
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@ -855,7 +861,7 @@ static void lsi_do_msgin(LSIState *s)
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static uint8_t lsi_get_msgbyte(LSIState *s)
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static uint8_t lsi_get_msgbyte(LSIState *s)
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{
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{
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uint8_t data;
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uint8_t data;
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pci_dma_read(&s->dev, s->dnad, &data, 1);
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pci_dma_read(PCI_DEVICE(s), s->dnad, &data, 1);
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s->dnad++;
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s->dnad++;
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s->dbc--;
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s->dbc--;
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return data;
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return data;
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@ -1001,14 +1007,15 @@ static inline int32_t sxt24(int32_t n)
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#define LSI_BUF_SIZE 4096
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#define LSI_BUF_SIZE 4096
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static void lsi_memcpy(LSIState *s, uint32_t dest, uint32_t src, int count)
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static void lsi_memcpy(LSIState *s, uint32_t dest, uint32_t src, int count)
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{
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{
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PCIDevice *d = PCI_DEVICE(s);
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int n;
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int n;
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uint8_t buf[LSI_BUF_SIZE];
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uint8_t buf[LSI_BUF_SIZE];
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DPRINTF("memcpy dest 0x%08x src 0x%08x count %d\n", dest, src, count);
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DPRINTF("memcpy dest 0x%08x src 0x%08x count %d\n", dest, src, count);
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while (count) {
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while (count) {
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n = (count > LSI_BUF_SIZE) ? LSI_BUF_SIZE : count;
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n = (count > LSI_BUF_SIZE) ? LSI_BUF_SIZE : count;
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pci_dma_read(&s->dev, src, buf, n);
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pci_dma_read(d, src, buf, n);
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pci_dma_write(&s->dev, dest, buf, n);
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pci_dma_write(d, dest, buf, n);
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src += n;
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src += n;
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dest += n;
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dest += n;
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count -= n;
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count -= n;
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@ -1034,6 +1041,7 @@ static void lsi_wait_reselect(LSIState *s)
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static void lsi_execute_script(LSIState *s)
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static void lsi_execute_script(LSIState *s)
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{
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{
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PCIDevice *pci_dev = PCI_DEVICE(s);
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uint32_t insn;
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uint32_t insn;
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uint32_t addr, addr_high;
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uint32_t addr, addr_high;
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int opcode;
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int opcode;
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@ -1076,7 +1084,7 @@ again:
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/* 32-bit Table indirect */
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/* 32-bit Table indirect */
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offset = sxt24(addr);
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offset = sxt24(addr);
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pci_dma_read(&s->dev, s->dsa + offset, buf, 8);
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pci_dma_read(pci_dev, s->dsa + offset, buf, 8);
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/* byte count is stored in bits 0:23 only */
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/* byte count is stored in bits 0:23 only */
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s->dbc = cpu_to_le32(buf[0]) & 0xffffff;
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s->dbc = cpu_to_le32(buf[0]) & 0xffffff;
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s->rbc = s->dbc;
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s->rbc = s->dbc;
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@ -1435,7 +1443,7 @@ again:
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n = (insn & 7);
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n = (insn & 7);
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reg = (insn >> 16) & 0xff;
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reg = (insn >> 16) & 0xff;
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if (insn & (1 << 24)) {
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if (insn & (1 << 24)) {
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pci_dma_read(&s->dev, addr, data, n);
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pci_dma_read(pci_dev, addr, data, n);
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DPRINTF("Load reg 0x%x size %d addr 0x%08x = %08x\n", reg, n,
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DPRINTF("Load reg 0x%x size %d addr 0x%08x = %08x\n", reg, n,
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addr, *(int *)data);
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addr, *(int *)data);
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for (i = 0; i < n; i++) {
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for (i = 0; i < n; i++) {
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@ -1446,7 +1454,7 @@ again:
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for (i = 0; i < n; i++) {
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for (i = 0; i < n; i++) {
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data[i] = lsi_reg_readb(s, reg + i);
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data[i] = lsi_reg_readb(s, reg + i);
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}
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}
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pci_dma_write(&s->dev, addr, data, n);
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pci_dma_write(pci_dev, addr, data, n);
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}
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}
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}
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}
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}
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}
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@ -1988,7 +1996,7 @@ static const VMStateDescription vmstate_lsi_scsi = {
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.minimum_version_id_old = 0,
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.minimum_version_id_old = 0,
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.pre_save = lsi_pre_save,
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.pre_save = lsi_pre_save,
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.fields = (VMStateField []) {
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.fields = (VMStateField []) {
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VMSTATE_PCI_DEVICE(dev, LSIState),
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VMSTATE_PCI_DEVICE(parent_obj, LSIState),
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VMSTATE_INT32(carry, LSIState),
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VMSTATE_INT32(carry, LSIState),
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VMSTATE_INT32(status, LSIState),
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VMSTATE_INT32(status, LSIState),
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@ -2089,7 +2097,7 @@ static int lsi_scsi_init(PCIDevice *dev)
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DeviceState *d = DEVICE(dev);
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DeviceState *d = DEVICE(dev);
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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pci_conf = s->dev.config;
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pci_conf = dev->config;
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/* PCI latency timer = 255 */
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/* PCI latency timer = 255 */
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pci_conf[PCI_LATENCY_TIMER] = 0xff;
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pci_conf[PCI_LATENCY_TIMER] = 0xff;
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@ -2103,9 +2111,9 @@ static int lsi_scsi_init(PCIDevice *dev)
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memory_region_init_io(&s->io_io, OBJECT(s), &lsi_io_ops, s,
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memory_region_init_io(&s->io_io, OBJECT(s), &lsi_io_ops, s,
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"lsi-io", 256);
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"lsi-io", 256);
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pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
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pci_register_bar(&s->dev, 1, 0, &s->mmio_io);
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pci_register_bar(dev, 1, 0, &s->mmio_io);
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pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->ram_io);
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pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->ram_io);
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QTAILQ_INIT(&s->queue);
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QTAILQ_INIT(&s->queue);
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scsi_bus_new(&s->bus, d, &lsi_scsi_info, NULL);
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scsi_bus_new(&s->bus, d, &lsi_scsi_info, NULL);
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