Cancel IDE outstanding IO on device reset (Gleb Natapov)
Cancel AIO in IDE layer on device rest in order to be in deterministic state during next boot. Signed-off-by: Gleb Natapov <gleb@qumranet.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5011 c046a42c-6fe2-441c-8c8c-71466251a162
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hw/ide.c
40
hw/ide.c
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@ -2844,6 +2844,23 @@ static void ide_dma_start(IDEState *s, BlockDriverCompletionFunc *dma_cb)
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}
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}
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static void ide_dma_cancel(BMDMAState *bm)
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{
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if (bm->status & BM_STATUS_DMAING) {
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bm->status &= ~BM_STATUS_DMAING;
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/* cancel DMA request */
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bm->ide_if = NULL;
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bm->dma_cb = NULL;
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if (bm->aiocb) {
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#ifdef DEBUG_AIO
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printf("aio_cancel\n");
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#endif
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bdrv_aio_cancel(bm->aiocb);
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bm->aiocb = NULL;
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}
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}
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}
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static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
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{
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BMDMAState *bm = opaque;
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@ -2852,19 +2869,7 @@ static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
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#endif
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if (!(val & BM_CMD_START)) {
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/* XXX: do it better */
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if (bm->status & BM_STATUS_DMAING) {
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bm->status &= ~BM_STATUS_DMAING;
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/* cancel DMA request */
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bm->ide_if = NULL;
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bm->dma_cb = NULL;
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if (bm->aiocb) {
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#ifdef DEBUG_AIO
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printf("aio_cancel\n");
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#endif
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bdrv_aio_cancel(bm->aiocb);
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bm->aiocb = NULL;
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}
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}
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ide_dma_cancel(bm);
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bm->cmd = val & 0x09;
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} else {
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if (!(bm->status & BM_STATUS_DMAING)) {
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@ -3188,9 +3193,14 @@ static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
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return 0;
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}
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static void piix3_reset(PCIIDEState *d)
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static void piix3_reset(void *opaque)
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{
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PCIIDEState *d = opaque;
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uint8_t *pci_conf = d->dev.config;
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int i;
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for (i = 0; i < 2; i++)
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ide_dma_cancel(&d->bmdma[i]);
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pci_conf[0x04] = 0x00;
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pci_conf[0x05] = 0x00;
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@ -3224,6 +3234,7 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
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pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
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pci_conf[0x0e] = 0x00; // header_type
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qemu_register_reset(piix3_reset, d);
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piix3_reset(d);
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pci_register_io_region((PCIDevice *)d, 4, 0x10,
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@ -3262,6 +3273,7 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
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pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
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pci_conf[0x0e] = 0x00; // header_type
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qemu_register_reset(piix3_reset, d);
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piix3_reset(d);
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pci_register_io_region((PCIDevice *)d, 4, 0x10,
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