i386: hvf: remove more dead emulator code
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
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6701d81d74
commit
746827825d
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@ -738,7 +738,6 @@ int hvf_vcpu_exec(CPUState *cpu)
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uint32_t port = exit_qual >> 16;
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/*uint32_t rep = (exit_qual & 0x20) != 0;*/
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#if 1
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if (!string && in) {
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uint64_t val = 0;
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load_regs(cpu);
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@ -761,7 +760,6 @@ int hvf_vcpu_exec(CPUState *cpu)
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macvm_set_rip(cpu, rip + ins_len);
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break;
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}
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#endif
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struct x86_decode decode;
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load_regs(cpu);
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@ -102,10 +102,6 @@ typedef struct x86_reg_flags {
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};
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} __attribute__ ((__packed__)) x86_reg_flags;
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typedef struct x86_efer {
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uint64_t efer;
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} __attribute__ ((__packed__)) x86_efer;
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typedef enum x86_reg_cr0 {
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CR0_PE = (1L << 0),
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CR0_MP = (1L << 1),
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@ -305,7 +301,6 @@ struct HVFX86EmulatorState {
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struct x86_register regs[16];
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struct x86_reg_flags rflags;
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struct lazy_flags lflags;
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struct x86_efer efer;
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uint8_t mmio_buf[4096];
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};
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@ -631,7 +631,7 @@ static void decode_aegroup(CPUX86State *env, struct x86_decode *decode)
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}
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break;
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default:
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VM_PANIC_ON_EX(1, "0xae: reg %d\n", decode->modrm.reg);
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VM_PANIC_EX("0xae: reg %d\n", decode->modrm.reg);
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break;
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}
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}
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@ -655,14 +655,14 @@ static void decode_d9_4(CPUX86State *env, struct x86_decode *decode)
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decode->cmd = X86_DECODE_CMD_FABS;
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break;
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case 0xe4:
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VM_PANIC_ON_EX(1, "FTST");
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VM_PANIC("FTST");
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break;
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case 0xe5:
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/* FXAM */
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decode->cmd = X86_DECODE_CMD_FXAM;
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break;
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default:
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VM_PANIC_ON_EX(1, "FLDENV");
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VM_PANIC("FLDENV");
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break;
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}
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}
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@ -671,16 +671,16 @@ static void decode_db_4(CPUX86State *env, struct x86_decode *decode)
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{
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switch (decode->modrm.modrm) {
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case 0xe0:
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VM_PANIC_ON_EX(1, "unhandled FNENI: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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VM_PANIC_EX("unhandled FNENI: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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break;
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case 0xe1:
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VM_PANIC_ON_EX(1, "unhandled FNDISI: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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VM_PANIC_EX("unhandled FNDISI: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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break;
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case 0xe2:
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VM_PANIC_ON_EX(1, "unhandled FCLEX: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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VM_PANIC_EX("unhandled FCLEX: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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break;
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case 0xe3:
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decode->cmd = X86_DECODE_CMD_FNINIT;
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@ -689,8 +689,8 @@ static void decode_db_4(CPUX86State *env, struct x86_decode *decode)
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decode->cmd = X86_DECODE_CMD_FNSETPM;
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break;
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default:
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VM_PANIC_ON_EX(1, "unhandled fpu opcode: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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VM_PANIC_EX("unhandled fpu opcode: %x %x\n", decode->opcode[0],
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decode->modrm.modrm);
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break;
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}
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}
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@ -837,7 +837,6 @@ void simulate_wrmsr(struct CPUState *cpu)
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abort();
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break;
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case MSR_EFER:
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env->hvf_emul->efer.efer = data;
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/*printf("new efer %llx\n", EFER(cpu));*/
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wvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER, data);
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if (data & MSR_EFER_NXE) {
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@ -1511,23 +1510,15 @@ bool exec_instruction(struct CPUX86State *env, struct x86_decode *ins)
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printf("%d, %llx: exec_instruction %s\n", hvf_vcpu_id(cpu), RIP(cpu),
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decode_cmd_to_string(ins->cmd));*/
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if (0 && ins->is_fpu) {
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VM_PANIC("emulate fpu\n");
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} else {
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if (!_cmd_handler[ins->cmd].handler) {
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printf("Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
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ins->cmd, ins->opcode[0],
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ins->opcode_len > 1 ? ins->opcode[1] : 0);
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RIP(env) += ins->len;
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return true;
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}
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VM_PANIC_ON_EX(!_cmd_handler[ins->cmd].handler,
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"Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
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ins->cmd, ins->opcode[0],
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ins->opcode_len > 1 ? ins->opcode[1] : 0);
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_cmd_handler[ins->cmd].handler(env, ins);
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if (!_cmd_handler[ins->cmd].handler) {
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printf("Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
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ins->cmd, ins->opcode[0],
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ins->opcode_len > 1 ? ins->opcode[1] : 0);
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RIP(env) += ins->len;
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return true;
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}
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_cmd_handler[ins->cmd].handler(env, ins);
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return true;
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}
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@ -301,16 +301,6 @@ void set_SF(CPUX86State *env, bool val)
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env->hvf_emul->lflags.auxbits ^= (temp_sf ^ val) << LF_BIT_SD;
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}
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void set_OSZAPC(CPUX86State *env, uint32_t flags32)
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{
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set_OF(env, env->hvf_emul->rflags.of);
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set_SF(env, env->hvf_emul->rflags.sf);
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set_ZF(env, env->hvf_emul->rflags.zf);
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set_AF(env, env->hvf_emul->rflags.af);
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set_PF(env, env->hvf_emul->rflags.pf);
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set_CF(env, env->hvf_emul->rflags.cf);
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}
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void lflags_to_rflags(CPUX86State *env)
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{
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env->hvf_emul->rflags.cf = get_CF(env);
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@ -190,7 +190,6 @@ bool get_SF(CPUX86State *env);
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void set_SF(CPUX86State *env, bool val);
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bool get_OF(CPUX86State *env);
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void set_OF(CPUX86State *env, bool val);
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void set_OSZAPC(CPUX86State *env, uint32_t flags32);
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void SET_FLAGS_OxxxxC(CPUX86State *env, uint32_t new_of, uint32_t new_cf);
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@ -238,8 +238,7 @@ void vmx_write_mem(struct CPUState *cpu, addr_t gva, void *data, int bytes)
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int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
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if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
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VM_PANIC_ON_EX(1, "%s: mmu_gva_to_gpa %llx failed\n", __func__,
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gva);
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VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
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} else {
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address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
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data, copy, 1);
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@ -260,8 +259,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, addr_t gva, int bytes)
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int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
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if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
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VM_PANIC_ON_EX(1, "%s: mmu_gva_to_gpa %llx failed\n", __func__,
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gva);
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VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
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}
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address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
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data, copy, 0);
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@ -89,16 +89,6 @@ static void load_state_from_tss32(CPUState *cpu, struct x86_tss_segment32 *tss)
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vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ds}}, R_DS);
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vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->fs}}, R_FS);
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vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->gs}}, R_GS);
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#if 0
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load_segment(cpu, R_LDTR, tss->ldt);
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load_segment(cpu, R_ES, tss->es);
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load_segment(cpu, R_CS, tss->cs);
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load_segment(cpu, R_SS, tss->ss);
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load_segment(cpu, R_DS, tss->ds);
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load_segment(cpu, R_FS, tss->fs);
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load_segment(cpu, R_GS, tss->gs);
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#endif
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}
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static int task_switch_32(CPUState *cpu, x68_segment_selector tss_sel, x68_segment_selector old_tss_sel,
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