hw/gpio/pl061: Add tracepoints for register read and write

Add tracepoints for reads and writes to the PL061 registers. This requires
restructuring pl061_read() to only return after the tracepoint, rather
than having lots of early-returns.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Peter Maydell 2021-07-02 11:40:11 +01:00
parent e24a9f6a59
commit 74d359b52d
2 changed files with 50 additions and 22 deletions

View file

@ -149,90 +149,114 @@ static uint64_t pl061_read(void *opaque, hwaddr offset,
unsigned size)
{
PL061State *s = (PL061State *)opaque;
uint64_t r = 0;
switch (offset) {
case 0x0 ... 0x3ff: /* Data */
return s->data & (offset >> 2);
r = s->data & (offset >> 2);
break;
case 0x400: /* Direction */
return s->dir;
r = s->dir;
break;
case 0x404: /* Interrupt sense */
return s->isense;
r = s->isense;
break;
case 0x408: /* Interrupt both edges */
return s->ibe;
r = s->ibe;
break;
case 0x40c: /* Interrupt event */
return s->iev;
r = s->iev;
break;
case 0x410: /* Interrupt mask */
return s->im;
r = s->im;
break;
case 0x414: /* Raw interrupt status */
return s->istate;
r = s->istate;
break;
case 0x418: /* Masked interrupt status */
return s->istate & s->im;
r = s->istate & s->im;
break;
case 0x420: /* Alternate function select */
return s->afsel;
r = s->afsel;
break;
case 0x500: /* 2mA drive */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->dr2r;
r = s->dr2r;
break;
case 0x504: /* 4mA drive */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->dr4r;
r = s->dr4r;
break;
case 0x508: /* 8mA drive */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->dr8r;
r = s->dr8r;
break;
case 0x50c: /* Open drain */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->odr;
r = s->odr;
break;
case 0x510: /* Pull-up */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->pur;
r = s->pur;
break;
case 0x514: /* Pull-down */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->pdr;
r = s->pdr;
break;
case 0x518: /* Slew rate control */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->slr;
r = s->slr;
break;
case 0x51c: /* Digital enable */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->den;
r = s->den;
break;
case 0x520: /* Lock */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->locked;
r = s->locked;
break;
case 0x524: /* Commit */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->cr;
r = s->cr;
break;
case 0x528: /* Analog mode select */
if (s->id != pl061_id_luminary) {
goto bad_offset;
}
return s->amsel;
r = s->amsel;
break;
case 0xfd0 ... 0xfff: /* ID registers */
return s->id[(offset - 0xfd0) >> 2];
r = s->id[(offset - 0xfd0) >> 2];
break;
default:
bad_offset:
qemu_log_mask(LOG_GUEST_ERROR,
"pl061_read: Bad offset %x\n", (int)offset);
break;
}
return 0;
trace_pl061_read(DEVICE(s)->canonical_path, offset, r);
return r;
}
static void pl061_write(void *opaque, hwaddr offset,
@ -241,6 +265,8 @@ static void pl061_write(void *opaque, hwaddr offset,
PL061State *s = (PL061State *)opaque;
uint8_t mask;
trace_pl061_write(DEVICE(s)->canonical_path, offset, value);
switch (offset) {
case 0 ... 0x3ff:
mask = (offset >> 2) & s->dir;

View file

@ -18,6 +18,8 @@ pl061_update(const char *id, uint32_t dir, uint32_t data) "%s GPIODIR 0x%x GPIOD
pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d"
pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d"
pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) "%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d"
pl061_read(const char *id, uint64_t offset, uint64_t r) "%s offset 0x%" PRIx64 " value 0x%" PRIx64
pl061_write(const char *id, uint64_t offset, uint64_t value) "%s offset 0x%" PRIx64 " value 0x%" PRIx64
# sifive_gpio.c
sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64