qos-test: sdhci test node
Convert tests/sdhci-test in first qgraph test node, sdhci-test. This test consumes an sdhci interface and checks that its function return the expected values. Note that this test does not allocate any sdhci structure, it's all done by the qtest walking graph mechanism Signed-off-by: Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Emanuele Giuseppe Esposito
Paolo Bonzini
parent
555299cb56
commit
757c6eac8e
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@ -229,7 +229,6 @@ check-qtest-i386-y += tests/test-announce-self$(EXESUF)
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check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF)
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check-qtest-i386-y += tests/numa-test$(EXESUF)
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check-qtest-x86_64-y += $(check-qtest-i386-y)
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check-qtest-x86_64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)
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check-qtest-alpha-y += tests/boot-serial-test$(EXESUF)
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check-qtest-alpha-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF)
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@ -299,11 +298,9 @@ check-qtest-arm-y += tests/m25p80-test$(EXESUF)
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check-qtest-arm-$(CONFIG_VIRTIO_BLK) += tests/virtio-blk-test$(EXESUF)
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check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF)
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check-qtest-arm-y += tests/boot-serial-test$(EXESUF)
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check-qtest-arm-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)
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check-qtest-arm-y += tests/hexloader-test$(EXESUF)
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check-qtest-aarch64-y = tests/numa-test$(EXESUF)
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check-qtest-aarch64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)
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check-qtest-aarch64-y += tests/boot-serial-test$(EXESUF)
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check-qtest-aarch64-y += tests/migration-test$(EXESUF)
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@ -762,6 +759,9 @@ qos-test-obj-y += tests/libqos/arm-smdkc210-machine.o
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qos-test-obj-y += tests/libqos/arm-xilinx-zynq-a9-machine.o
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qos-test-obj-y += tests/libqos/x86_64_pc-machine.o
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# Tests
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qos-test-obj-y += tests/sdhci-test.o
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check-unit-y += tests/test-qgraph$(EXESUF)
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tests/test-qgraph$(EXESUF): tests/test-qgraph.o $(libqgraph-obj-y)
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@ -857,7 +857,6 @@ tests/test-arm-mptimer$(EXESUF): tests/test-arm-mptimer.o
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tests/test-qapi-util$(EXESUF): tests/test-qapi-util.o $(test-util-obj-y)
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tests/numa-test$(EXESUF): tests/numa-test.o
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tests/vmgenid-test$(EXESUF): tests/vmgenid-test.o tests/boot-sector.o tests/acpi-utils.o
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tests/sdhci-test$(EXESUF): tests/sdhci-test.o $(libqos-pc-obj-y)
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tests/cdrom-test$(EXESUF): tests/cdrom-test.o tests/boot-sector.o $(libqos-obj-y)
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tests/migration/stress$(EXESUF): tests/migration/stress.o
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@ -12,6 +12,8 @@
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#include "libqtest.h"
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#include "libqos/pci-pc.h"
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#include "hw/pci/pci.h"
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#include "libqos/qgraph.h"
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#include "libqos/sdhci.h"
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#define SDHC_CAPAB 0x40
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FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */
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@ -20,99 +22,11 @@ FIELD(SDHC_CAPAB, SDR, 32, 3); /* since v3 */
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FIELD(SDHC_CAPAB, DRIVER, 36, 3); /* since v3 */
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#define SDHC_HCVER 0xFE
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static const struct sdhci_t {
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const char *arch, *machine;
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struct {
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uintptr_t addr;
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uint8_t version;
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uint8_t baseclock;
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struct {
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bool sdma;
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uint64_t reg;
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} capab;
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} sdhci;
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struct {
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uint16_t vendor_id, device_id;
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} pci;
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} models[] = {
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/* PC via PCI */
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{ "x86_64", "pc",
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{-1, 2, 0, {1, 0x057834b4} },
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.pci = { PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_SDHCI } },
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/* Exynos4210 */
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{ "arm", "smdkc210",
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{0x12510000, 2, 0, {1, 0x5e80080} } },
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/* i.MX 6 */
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{ "arm", "sabrelite",
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{0x02190000, 3, 0, {1, 0x057834b4} } },
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/* BCM2835 */
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{ "arm", "raspi2",
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{0x3f300000, 3, 52, {0, 0x052134b4} } },
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/* Zynq-7000 */
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{ "arm", "xilinx-zynq-a9", /* Datasheet: UG585 (v1.12.1) */
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{0xe0100000, 2, 0, {1, 0x69ec0080} } },
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/* ZynqMP */
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{ "aarch64", "xlnx-zcu102", /* Datasheet: UG1085 (v1.7) */
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{0xff160000, 3, 0, {1, 0x280737ec6481} } },
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};
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typedef struct QSDHCI {
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struct {
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QPCIBus *bus;
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QPCIDevice *dev;
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} pci;
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union {
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QPCIBar mem_bar;
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uint64_t addr;
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};
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} QSDHCI;
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static uint16_t sdhci_readw(QSDHCI *s, uint32_t reg)
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{
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uint16_t val;
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if (s->pci.dev) {
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val = qpci_io_readw(s->pci.dev, s->mem_bar, reg);
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} else {
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val = qtest_readw(global_qtest, s->addr + reg);
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}
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return val;
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}
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static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg)
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{
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uint64_t val;
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if (s->pci.dev) {
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val = qpci_io_readq(s->pci.dev, s->mem_bar, reg);
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} else {
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val = qtest_readq(global_qtest, s->addr + reg);
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}
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return val;
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}
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static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val)
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{
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if (s->pci.dev) {
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qpci_io_writeq(s->pci.dev, s->mem_bar, reg, val);
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} else {
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qtest_writeq(global_qtest, s->addr + reg, val);
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}
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}
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static void check_specs_version(QSDHCI *s, uint8_t version)
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{
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uint32_t v;
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v = sdhci_readw(s, SDHC_HCVER);
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v = s->readw(s, SDHC_HCVER);
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v &= 0xff;
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v += 1;
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g_assert_cmpuint(v, ==, version);
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@ -122,7 +36,7 @@ static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab)
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{
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uint64_t capab;
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capab = sdhci_readq(s, SDHC_CAPAB);
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capab = s->readq(s, SDHC_CAPAB);
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g_assert_cmphex(capab, ==, expec_capab);
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}
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@ -131,11 +45,11 @@ static void check_capab_readonly(QSDHCI *s)
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const uint64_t vrand = 0x123456789abcdef;
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uint64_t capab0, capab1;
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capab0 = sdhci_readq(s, SDHC_CAPAB);
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capab0 = s->readq(s, SDHC_CAPAB);
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g_assert_cmpuint(capab0, !=, vrand);
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sdhci_writeq(s, SDHC_CAPAB, vrand);
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capab1 = sdhci_readq(s, SDHC_CAPAB);
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s->writeq(s, SDHC_CAPAB, vrand);
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capab1 = s->readq(s, SDHC_CAPAB);
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g_assert_cmpuint(capab1, !=, vrand);
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g_assert_cmpuint(capab1, ==, capab0);
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}
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@ -147,7 +61,7 @@ static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq)
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if (!expec_freq) {
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return;
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}
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capab = sdhci_readq(s, SDHC_CAPAB);
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capab = s->readq(s, SDHC_CAPAB);
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capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ);
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g_assert_cmpuint(capab_freq, ==, expec_freq);
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}
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@ -156,7 +70,7 @@ static void check_capab_sdma(QSDHCI *s, bool supported)
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{
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uint64_t capab, capab_sdma;
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capab = sdhci_readq(s, SDHC_CAPAB);
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capab = s->readq(s, SDHC_CAPAB);
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capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
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g_assert_cmpuint(capab_sdma, ==, supported);
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}
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@ -167,7 +81,7 @@ static void check_capab_v3(QSDHCI *s, uint8_t version)
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if (version < 3) {
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/* before v3 those fields are RESERVED */
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capab = sdhci_readq(s, SDHC_CAPAB);
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capab = s->readq(s, SDHC_CAPAB);
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capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, SDR);
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g_assert_cmpuint(capab_v3, ==, 0);
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capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, DRIVER);
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@ -175,78 +89,21 @@ static void check_capab_v3(QSDHCI *s, uint8_t version)
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}
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}
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static QSDHCI *machine_start(const struct sdhci_t *test)
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static void test_registers(void *obj, void *data, QGuestAllocator *alloc)
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{
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QSDHCI *s = g_new0(QSDHCI, 1);
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QSDHCI *s = obj;
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if (test->pci.vendor_id) {
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/* PCI */
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uint16_t vendor_id, device_id;
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uint64_t barsize;
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global_qtest = qtest_initf("-machine %s -device sdhci-pci",
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test->machine);
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s->pci.bus = qpci_new_pc(global_qtest, NULL);
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/* Find PCI device and verify it's the right one */
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s->pci.dev = qpci_device_find(s->pci.bus, QPCI_DEVFN(4, 0));
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g_assert_nonnull(s->pci.dev);
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vendor_id = qpci_config_readw(s->pci.dev, PCI_VENDOR_ID);
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device_id = qpci_config_readw(s->pci.dev, PCI_DEVICE_ID);
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g_assert(vendor_id == test->pci.vendor_id);
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g_assert(device_id == test->pci.device_id);
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s->mem_bar = qpci_iomap(s->pci.dev, 0, &barsize);
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qpci_device_enable(s->pci.dev);
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} else {
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/* SysBus */
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global_qtest = qtest_initf("-machine %s", test->machine);
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s->addr = test->sdhci.addr;
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}
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return s;
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}
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static void machine_stop(QSDHCI *s)
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{
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qpci_free_pc(s->pci.bus);
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g_free(s->pci.dev);
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qtest_quit(global_qtest);
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g_free(s);
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}
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static void test_machine(const void *data)
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{
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const struct sdhci_t *test = data;
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QSDHCI *s;
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s = machine_start(test);
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check_specs_version(s, test->sdhci.version);
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check_capab_capareg(s, test->sdhci.capab.reg);
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check_specs_version(s, s->props.version);
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check_capab_capareg(s, s->props.capab.reg);
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check_capab_readonly(s);
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check_capab_v3(s, test->sdhci.version);
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check_capab_sdma(s, test->sdhci.capab.sdma);
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check_capab_baseclock(s, test->sdhci.baseclock);
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machine_stop(s);
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check_capab_v3(s, s->props.version);
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check_capab_sdma(s, s->props.capab.sdma);
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check_capab_baseclock(s, s->props.baseclock);
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}
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int main(int argc, char *argv[])
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static void register_sdhci_test(void)
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{
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const char *arch = qtest_get_arch();
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char *name;
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int i;
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g_test_init(&argc, &argv, NULL);
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for (i = 0; i < ARRAY_SIZE(models); i++) {
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if (strcmp(arch, models[i].arch)) {
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continue;
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}
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name = g_strdup_printf("sdhci/%s", models[i].machine);
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qtest_add_data_func(name, &models[i], test_machine);
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g_free(name);
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}
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return g_test_run();
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qos_add_test("registers", "sdhci", test_registers, NULL);
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}
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libqos_init(register_sdhci_test);
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