target-ppc: consolidate store operations
Implement macro to consolidate store operations using newer tcg_gen_qemu_st function. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -2498,30 +2498,27 @@ GEN_QEMU_LOAD_64(ld64, DEF_MEMOP(MO_Q))
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GEN_QEMU_LOAD_64(ld64ur, BSWAP_MEMOP(MO_Q))
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#endif
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static inline void gen_qemu_st8(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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tcg_gen_qemu_st8(arg1, arg2, ctx->mem_idx);
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#define GEN_QEMU_STORE_TL(stop, op) \
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static void glue(gen_qemu_, stop)(DisasContext *ctx, \
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TCGv val, \
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TCGv addr) \
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{ \
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tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx, op); \
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}
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static inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UW | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
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GEN_QEMU_STORE_TL(st8, DEF_MEMOP(MO_UB))
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GEN_QEMU_STORE_TL(st16, DEF_MEMOP(MO_UW))
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GEN_QEMU_STORE_TL(st32, DEF_MEMOP(MO_UL))
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#define GEN_QEMU_STORE_64(stop, op) \
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static void glue(gen_qemu_, glue(stop, _i64))(DisasContext *ctx, \
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TCGv_i64 val, \
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TCGv addr) \
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{ \
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tcg_gen_qemu_st_i64(val, addr, ctx->mem_idx, op); \
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}
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static inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UL | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
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}
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static void gen_qemu_st32_i64(DisasContext *ctx, TCGv_i64 val, TCGv addr)
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{
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TCGv tmp = tcg_temp_new();
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tcg_gen_trunc_i64_tl(tmp, val);
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gen_qemu_st32(ctx, tmp, addr);
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tcg_temp_free(tmp);
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}
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GEN_QEMU_STORE_64(st32, DEF_MEMOP(MO_UL))
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static inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2)
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{
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