ppc/pnv: Add an "nr-threads" property to the base chip class
Set it at chip creation and forward it to the cores. This allows to drop a call to qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-7-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -802,6 +802,8 @@ static void pnv_init(MachineState *machine)
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&error_fatal);
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&error_fatal);
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object_property_set_int(chip, machine->smp.cores,
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object_property_set_int(chip, machine->smp.cores,
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"nr-cores", &error_fatal);
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"nr-cores", &error_fatal);
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object_property_set_int(chip, machine->smp.threads,
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"nr-threads", &error_fatal);
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/*
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/*
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* The POWER8 machine use the XICS interrupt interface.
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* The POWER8 machine use the XICS interrupt interface.
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* Propagate the XICS fabric to the chip and its controllers.
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* Propagate the XICS fabric to the chip and its controllers.
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@ -1526,7 +1528,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp)
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static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
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static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
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{
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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Error *error = NULL;
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Error *error = NULL;
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
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const char *typename = pnv_chip_core_typename(chip);
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const char *typename = pnv_chip_core_typename(chip);
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@ -1562,8 +1563,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
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object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
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object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
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&error_abort);
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&error_abort);
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chip->cores[i] = pnv_core;
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chip->cores[i] = pnv_core;
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object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
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object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
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&error_fatal);
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"nr-threads", &error_fatal);
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object_property_set_int(OBJECT(pnv_core), core_hwid,
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object_property_set_int(OBJECT(pnv_core), core_hwid,
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CPU_CORE_PROP_CORE_ID, &error_fatal);
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CPU_CORE_PROP_CORE_ID, &error_fatal);
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object_property_set_int(OBJECT(pnv_core),
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object_property_set_int(OBJECT(pnv_core),
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@ -1602,6 +1603,7 @@ static Property pnv_chip_properties[] = {
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DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),
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DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),
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DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1),
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DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1),
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DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
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DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
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DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -48,6 +48,7 @@ typedef struct PnvChip {
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uint64_t ram_size;
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uint64_t ram_size;
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uint32_t nr_cores;
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uint32_t nr_cores;
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uint32_t nr_threads;
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uint64_t cores_mask;
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uint64_t cores_mask;
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PnvCore **cores;
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PnvCore **cores;
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