x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0. Merge raise_exception_env() to raise_exception(), likewise with raise_exception_err_env() and raise_exception_err(). Introduce cpu_svm_check_intercept_param() and cpu_vmexit() as wrappers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
parent
20054ef03e
commit
77b2bc2c09
12
cpu-exec.c
12
cpu-exec.c
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@ -289,7 +289,8 @@ int cpu_exec(CPUArchState *env)
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#endif
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#endif
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#if defined(TARGET_I386)
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#if defined(TARGET_I386)
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if (interrupt_request & CPU_INTERRUPT_INIT) {
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if (interrupt_request & CPU_INTERRUPT_INIT) {
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svm_check_intercept(env, SVM_EXIT_INIT);
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cpu_svm_check_intercept_param(env, SVM_EXIT_INIT,
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0);
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do_cpu_init(x86_env_get_cpu(env));
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do_cpu_init(x86_env_get_cpu(env));
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env->exception_index = EXCP_HALTED;
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env->exception_index = EXCP_HALTED;
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cpu_loop_exit(env);
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cpu_loop_exit(env);
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@ -298,7 +299,8 @@ int cpu_exec(CPUArchState *env)
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} else if (env->hflags2 & HF2_GIF_MASK) {
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} else if (env->hflags2 & HF2_GIF_MASK) {
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if ((interrupt_request & CPU_INTERRUPT_SMI) &&
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if ((interrupt_request & CPU_INTERRUPT_SMI) &&
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!(env->hflags & HF_SMM_MASK)) {
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!(env->hflags & HF_SMM_MASK)) {
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svm_check_intercept(env, SVM_EXIT_SMI);
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cpu_svm_check_intercept_param(env, SVM_EXIT_SMI,
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0);
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env->interrupt_request &= ~CPU_INTERRUPT_SMI;
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env->interrupt_request &= ~CPU_INTERRUPT_SMI;
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do_smm_enter(env);
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do_smm_enter(env);
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next_tb = 0;
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next_tb = 0;
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@ -319,7 +321,8 @@ int cpu_exec(CPUArchState *env)
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(env->eflags & IF_MASK &&
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(env->eflags & IF_MASK &&
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!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
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!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
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int intno;
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int intno;
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svm_check_intercept(env, SVM_EXIT_INTR);
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cpu_svm_check_intercept_param(env, SVM_EXIT_INTR,
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0);
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env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
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env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
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intno = cpu_get_pic_interrupt(env);
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intno = cpu_get_pic_interrupt(env);
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
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@ -333,7 +336,8 @@ int cpu_exec(CPUArchState *env)
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!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
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!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
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int intno;
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int intno;
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/* FIXME: this should respect TPR */
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/* FIXME: this should respect TPR */
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svm_check_intercept(env, SVM_EXIT_VINTR);
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cpu_svm_check_intercept_param(env, SVM_EXIT_VINTR,
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0);
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intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
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intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
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do_interrupt_x86_hardirq(env, intno, 1);
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do_interrupt_x86_hardirq(env, intno, 1);
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@ -1074,13 +1074,15 @@ void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
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/* op_helper.c */
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/* op_helper.c */
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void do_interrupt(CPUX86State *env);
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void do_interrupt(CPUX86State *env);
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void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
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void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
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void QEMU_NORETURN raise_exception_env(int exception_index, CPUX86State *nenv);
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void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index);
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void QEMU_NORETURN raise_exception_err_env(CPUX86State *nenv, int exception_index,
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void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
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int error_code);
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int error_code);
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void do_smm_enter(CPUX86State *env1);
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void do_smm_enter(CPUX86State *env1);
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void svm_check_intercept(CPUX86State *env1, uint32_t type);
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void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
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uint64_t param);
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void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1);
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uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
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uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
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@ -951,7 +951,7 @@ static void breakpoint_handler(CPUX86State *env)
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if (env->watchpoint_hit->flags & BP_CPU) {
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if (env->watchpoint_hit->flags & BP_CPU) {
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env->watchpoint_hit = NULL;
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env->watchpoint_hit = NULL;
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if (check_hw_breakpoints(env, 0))
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if (check_hw_breakpoints(env, 0))
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raise_exception_env(EXCP01_DB, env);
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raise_exception(env, EXCP01_DB);
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else
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else
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cpu_resume_from_signal(env, NULL);
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cpu_resume_from_signal(env, NULL);
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}
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}
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@ -960,7 +960,7 @@ static void breakpoint_handler(CPUX86State *env)
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if (bp->pc == env->eip) {
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if (bp->pc == env->eip) {
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if (bp->flags & BP_CPU) {
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if (bp->flags & BP_CPU) {
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check_hw_breakpoints(env, 1);
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check_hw_breakpoints(env, 1);
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raise_exception_env(EXCP01_DB, env);
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raise_exception(env, EXCP01_DB);
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}
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}
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break;
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break;
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}
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}
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@ -63,8 +63,8 @@ DEF_HELPER_1(monitor, void, tl)
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DEF_HELPER_1(mwait, void, int)
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DEF_HELPER_1(mwait, void, int)
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DEF_HELPER_0(debug, void)
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DEF_HELPER_0(debug, void)
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DEF_HELPER_0(reset_rf, void)
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DEF_HELPER_0(reset_rf, void)
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DEF_HELPER_2(raise_interrupt, void, int, int)
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DEF_HELPER_3(raise_interrupt, void, env, int, int)
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DEF_HELPER_1(raise_exception, void, int)
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DEF_HELPER_2(raise_exception, void, env, int)
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DEF_HELPER_0(cli, void)
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DEF_HELPER_0(cli, void)
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DEF_HELPER_0(sti, void)
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DEF_HELPER_0(sti, void)
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DEF_HELPER_0(set_inhibit_irq, void)
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DEF_HELPER_0(set_inhibit_irq, void)
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File diff suppressed because it is too large
Load diff
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@ -2659,7 +2659,7 @@ static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
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if (s->cc_op != CC_OP_DYNAMIC)
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if (s->cc_op != CC_OP_DYNAMIC)
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gen_op_set_cc_op(s->cc_op);
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gen_op_set_cc_op(s->cc_op);
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gen_jmp_im(cur_eip);
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gen_jmp_im(cur_eip);
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gen_helper_raise_exception(tcg_const_i32(trapno));
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gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno));
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s->is_jmp = DISAS_TB_JUMP;
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s->is_jmp = DISAS_TB_JUMP;
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}
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}
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@ -2671,7 +2671,7 @@ static void gen_interrupt(DisasContext *s, int intno,
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if (s->cc_op != CC_OP_DYNAMIC)
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if (s->cc_op != CC_OP_DYNAMIC)
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gen_op_set_cc_op(s->cc_op);
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gen_op_set_cc_op(s->cc_op);
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gen_jmp_im(cur_eip);
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gen_jmp_im(cur_eip);
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gen_helper_raise_interrupt(tcg_const_i32(intno),
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gen_helper_raise_interrupt(cpu_env, tcg_const_i32(intno),
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tcg_const_i32(next_eip - cur_eip));
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tcg_const_i32(next_eip - cur_eip));
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s->is_jmp = DISAS_TB_JUMP;
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s->is_jmp = DISAS_TB_JUMP;
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}
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}
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@ -41,7 +41,7 @@
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static void exception_action(CPUArchState *env1)
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static void exception_action(CPUArchState *env1)
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{
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{
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#if defined(TARGET_I386)
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#if defined(TARGET_I386)
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raise_exception_err_env(env1, env1->exception_index, env1->error_code);
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raise_exception_err(env1, env1->exception_index, env1->error_code);
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#else
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#else
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cpu_loop_exit(env1);
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cpu_loop_exit(env1);
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#endif
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#endif
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