target/i386: add the tcg_enabled() in target/i386/
Add the tcg_enabled() where the x86 target needs to disable TCG-specific code. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -4040,8 +4040,10 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
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cc->class_by_name = x86_cpu_class_by_name;
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cc->parse_features = x86_cpu_parse_featurestr;
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cc->has_work = x86_cpu_has_work;
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#ifdef CONFIG_TCG
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cc->do_interrupt = x86_cpu_do_interrupt;
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cc->cpu_exec_interrupt = x86_cpu_exec_interrupt;
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#endif
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cc->dump_state = x86_cpu_dump_state;
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cc->get_crash_info = x86_cpu_get_crash_info;
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cc->set_pc = x86_cpu_set_pc;
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@ -4070,7 +4072,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
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cc->gdb_core_xml_file = "i386-32bit.xml";
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cc->gdb_num_core_regs = 41;
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#endif
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#ifndef CONFIG_USER_ONLY
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#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
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cc->debug_excp_handler = breakpoint_handler;
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#endif
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cc->cpu_exec_enter = x86_cpu_exec_enter;
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@ -52,7 +52,9 @@
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#include "exec/cpu-defs.h"
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#ifdef CONFIG_TCG
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#include "fpu/softfloat.h"
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#endif
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#define R_EAX 0
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#define R_ECX 1
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@ -1597,7 +1599,11 @@ uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
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static inline uint32_t cpu_compute_eflags(CPUX86State *env)
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{
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return env->eflags | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
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uint32_t eflags = env->eflags;
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if (tcg_enabled()) {
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eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
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}
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return eflags;
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}
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/* NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS
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@ -990,7 +990,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
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env->tpr_access_type = access;
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cpu_interrupt(cs, CPU_INTERRUPT_TPR);
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} else {
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} else if (tcg_enabled()) {
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cpu_restore_state(cs, cs->mem_io_pc);
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apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
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@ -281,16 +281,16 @@ static int cpu_post_load(void *opaque, int version_id)
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env->fptags[i] = (env->fptag_vmstate >> i) & 1;
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}
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if (tcg_enabled()) {
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target_ulong dr7;
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update_fp_status(env);
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update_mxcsr_status(env);
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}
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cpu_breakpoint_remove_all(cs, BP_CPU);
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cpu_watchpoint_remove_all(cs, BP_CPU);
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{
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/* Indicate all breakpoints disabled, as they are, then
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let the helper re-enable them. */
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target_ulong dr7 = env->dr[7];
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dr7 = env->dr[7];
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env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
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cpu_x86_update_dr7(env, dr7);
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}
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