target/ppc: SDR1 is a hypervisor resource
At present the SDR1 register - the base of the system's hashed page table (HPT) - is represented as an SPR with supervisor read and write permission. However, on CPUs which have a hypervisor mode, the SDR1 is a hypervisor only resource. Change the permission checking on the SPR to reflect this. Now that this is done, we don't need to check for an external HPT executing mtsdr1: an external HPT only applies when we're emulating the behaviour of a hypervisor, rather than modelling the CPU's hypervisor mode internally, so if we're permitted to execute mtsdr1, we don't have an external HPT. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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@ -82,11 +82,9 @@ void helper_store_sdr1(CPUPPCState *env, target_ulong val)
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{
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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if (!env->external_htab) {
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if (env->spr[SPR_SDR1] != val) {
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ppc_store_sdr1(env, val);
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tlb_flush(CPU(cpu));
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}
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if (env->spr[SPR_SDR1] != val) {
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ppc_store_sdr1(env, val);
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tlb_flush(CPU(cpu));
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}
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}
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@ -740,10 +740,22 @@ static void gen_spr_ne_601 (CPUPPCState *env)
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&spr_read_decr, &spr_write_decr,
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0x00000000);
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/* Memory management */
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spr_register(env, SPR_SDR1, "SDR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_sdr1,
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0x00000000);
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#ifndef CONFIG_USER_ONLY
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if (env->has_hv_mode) {
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/* SDR1 is a hypervisor resource on CPUs which have a
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* hypervisor mode */
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spr_register_hv(env, SPR_SDR1, "SDR1",
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SPR_NOACCESS, SPR_NOACCESS,
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_sdr1,
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0x00000000);
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} else {
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spr_register(env, SPR_SDR1, "SDR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_sdr1,
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0x00000000);
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}
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#endif
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}
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/* BATs 0-3 */
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