target-ppc: Scalar Non-Signalling Conversions
This patch adds the non-signalling scalar conversion instructions: - VSX Scalar Convert Single Precision to Double Precision Non-Signalling (xscvspdpn) - VSX Scalar Convert Double Precision to Single Precision Non-Signalling (xscvdpspn) Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -2487,6 +2487,22 @@ VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, f32[j], f64[i], 1)
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VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, f64[i], f32[j], 0)
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VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, f64[i], f32[j], 0)
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VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, f32[j], f64[i], 0)
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VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, f32[j], f64[i], 0)
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uint64_t helper_xscvdpspn(CPUPPCState *env, uint64_t xb)
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{
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float_status tstat = env->fp_status;
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set_float_exception_flags(0, &tstat);
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return (uint64_t)float64_to_float32(xb, &tstat) << 32;
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}
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uint64_t helper_xscvspdpn(CPUPPCState *env, uint64_t xb)
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{
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float_status tstat = env->fp_status;
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set_float_exception_flags(0, &tstat);
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return float32_to_float64(xb >> 32, &tstat);
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}
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/* VSX_CVT_FP_TO_INT - VSX floating point to integer conversion
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/* VSX_CVT_FP_TO_INT - VSX floating point to integer conversion
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* op - instruction mnemonic
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* op - instruction mnemonic
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* nels - number of elements (1, 2 or 4)
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* nels - number of elements (1, 2 or 4)
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@ -273,7 +273,9 @@ DEF_HELPER_2(xscmpudp, void, env, i32)
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DEF_HELPER_2(xsmaxdp, void, env, i32)
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DEF_HELPER_2(xsmaxdp, void, env, i32)
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DEF_HELPER_2(xsmindp, void, env, i32)
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DEF_HELPER_2(xsmindp, void, env, i32)
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DEF_HELPER_2(xscvdpsp, void, env, i32)
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DEF_HELPER_2(xscvdpsp, void, env, i32)
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DEF_HELPER_2(xscvdpspn, i64, env, i64)
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DEF_HELPER_2(xscvspdp, void, env, i32)
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DEF_HELPER_2(xscvspdp, void, env, i32)
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DEF_HELPER_2(xscvspdpn, i64, env, i64)
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DEF_HELPER_2(xscvdpsxds, void, env, i32)
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DEF_HELPER_2(xscvdpsxds, void, env, i32)
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DEF_HELPER_2(xscvdpsxws, void, env, i32)
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DEF_HELPER_2(xscvdpsxws, void, env, i32)
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DEF_HELPER_2(xscvdpuxds, void, env, i32)
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DEF_HELPER_2(xscvdpuxds, void, env, i32)
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@ -7437,7 +7437,9 @@ GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
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GEN_VSX_HELPER_XT_XB_ENV(xscvdpspn, 0x16, 0x10, 0, PPC2_VSX207)
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GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_XT_XB_ENV(xscvspdpn, 0x16, 0x14, 0, PPC2_VSX207)
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GEN_VSX_HELPER_2(xscvdpsxds, 0x10, 0x15, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpsxds, 0x10, 0x15, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpsxws, 0x10, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpsxws, 0x10, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpuxds, 0x10, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscvdpuxds, 0x10, 0x14, 0, PPC2_VSX)
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@ -10275,7 +10277,9 @@ GEN_XX2FORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
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GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
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GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
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GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
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GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
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GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
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GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
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GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207),
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GEN_XX2FORM(xscvspdp, 0x12, 0x14, PPC2_VSX),
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GEN_XX2FORM(xscvspdp, 0x12, 0x14, PPC2_VSX),
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GEN_XX2FORM(xscvspdpn, 0x16, 0x14, PPC2_VSX207),
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GEN_XX2FORM(xscvdpsxds, 0x10, 0x15, PPC2_VSX),
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GEN_XX2FORM(xscvdpsxds, 0x10, 0x15, PPC2_VSX),
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GEN_XX2FORM(xscvdpsxws, 0x10, 0x05, PPC2_VSX),
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GEN_XX2FORM(xscvdpsxws, 0x10, 0x05, PPC2_VSX),
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GEN_XX2FORM(xscvdpuxds, 0x10, 0x14, PPC2_VSX),
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GEN_XX2FORM(xscvdpuxds, 0x10, 0x14, PPC2_VSX),
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