target-ppc: convert st[16,32,64]r to use new macro
Make byte-swap routines use the common GEN_QEMU_STORE macro Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -2510,6 +2510,9 @@ GEN_QEMU_STORE_TL(st8, DEF_MEMOP(MO_UB))
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GEN_QEMU_STORE_TL(st16, DEF_MEMOP(MO_UW))
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GEN_QEMU_STORE_TL(st32, DEF_MEMOP(MO_UL))
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GEN_QEMU_STORE_TL(st16r, BSWAP_MEMOP(MO_UW))
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GEN_QEMU_STORE_TL(st32r, BSWAP_MEMOP(MO_UL))
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#define GEN_QEMU_STORE_64(stop, op) \
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static void glue(gen_qemu_, glue(stop, _i64))(DisasContext *ctx, \
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TCGv_i64 val, \
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@ -2521,6 +2524,10 @@ static void glue(gen_qemu_, glue(stop, _i64))(DisasContext *ctx, \
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GEN_QEMU_STORE_64(st32, DEF_MEMOP(MO_UL))
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GEN_QEMU_STORE_64(st64, DEF_MEMOP(MO_Q))
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#if defined(TARGET_PPC64)
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GEN_QEMU_STORE_64(st64r, BSWAP_MEMOP(MO_Q))
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#endif
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#define GEN_LD(name, ldop, opc, type) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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@ -2844,34 +2851,15 @@ GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
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#if defined(TARGET_PPC64)
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/* ldbrx */
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GEN_LDX_E(ldbr, ld64ur_i64, 0x14, 0x10, PPC_NONE, PPC2_DBRX, CHK_NONE);
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/* stdbrx */
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GEN_STX_E(stdbr, st64r_i64, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE);
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#endif /* TARGET_PPC64 */
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/* sthbrx */
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static inline void gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UW | (ctx->default_tcg_memop_mask ^ MO_BSWAP);
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tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
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}
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GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
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/* stwbrx */
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static inline void gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UL | (ctx->default_tcg_memop_mask ^ MO_BSWAP);
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tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
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}
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GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER);
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#if defined(TARGET_PPC64)
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/* stdbrx */
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static inline void gen_qemu_st64r(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_Q | (ctx->default_tcg_memop_mask ^ MO_BSWAP);
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tcg_gen_qemu_st_i64(arg1, arg2, ctx->mem_idx, op);
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}
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GEN_STX_E(stdbr, st64r, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE);
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#endif /* TARGET_PPC64 */
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/*** Integer load and store multiple ***/
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/* lmw */
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@ -6619,7 +6607,7 @@ GEN_STS(stw, st32, 0x04, PPC_INTEGER)
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#if defined(TARGET_PPC64)
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GEN_STUX(std, st64_i64, 0x15, 0x05, PPC_64B)
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GEN_STX(std, st64_i64, 0x15, 0x04, PPC_64B)
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GEN_STX_E(stdbr, st64r, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE)
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GEN_STX_E(stdbr, st64r_i64, 0x14, 0x14, PPC_NONE, PPC2_DBRX, CHK_NONE)
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GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST)
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GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST)
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GEN_STX_HVRM(sthcix, st16, 0x15, 0x1d, PPC_CILDST)
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