From 806fed593d0ed88d2f11e45cc54612daec98fe27 Mon Sep 17 00:00:00 2001 From: Greg Kurz Date: Mon, 6 Jan 2020 15:56:43 +0100 Subject: [PATCH] pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And use it instead of reaching out to the machine. This allows to get rid of pnv_get_chip(). Signed-off-by: Greg Kurz Signed-off-by: Cédric Le Goater Message-Id: <20200106145645.4539-11-clg@kaod.org> Signed-off-by: David Gibson --- hw/intc/pnv_xive.c | 8 ++------ hw/ppc/pnv.c | 14 -------------- include/hw/ppc/pnv.h | 2 -- 3 files changed, 2 insertions(+), 22 deletions(-) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 6412cf222e..715fca61ae 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -472,12 +472,8 @@ static uint8_t pnv_xive_get_block_id(XiveRouter *xrtr) static PnvXive *pnv_xive_tm_get_xive(PowerPCCPU *cpu) { int pir = ppc_cpu_pir(cpu); - PnvChip *chip; - PnvXive *xive; - - chip = pnv_get_chip(PNV9_PIR2CHIP(pir)); - assert(chip); - xive = &PNV9_CHIP(chip)->xive; + XivePresenter *xptr = XIVE_TCTX(pnv_cpu_state(cpu)->intc)->xptr; + PnvXive *xive = PNV_XIVE(xptr); if (!pnv_xive_is_cpu_enabled(xive, cpu)) { xive_error(xive, "IC: CPU %x is not enabled", pir); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 19fc5d4ddb..e2735bb8dd 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1717,20 +1717,6 @@ static int pnv_match_nvt(XiveFabric *xfb, uint8_t format, return total_count; } -PnvChip *pnv_get_chip(uint32_t chip_id) -{ - PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); - int i; - - for (i = 0; i < pnv->num_chips; i++) { - PnvChip *chip = pnv->chips[i]; - if (chip->chip_id == chip_id) { - return chip; - } - } - return NULL; -} - static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 2504d8cd4f..d65dd32036 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -219,8 +219,6 @@ struct PnvMachineState { PnvPnor *pnor; }; -PnvChip *pnv_get_chip(uint32_t chip_id); - #define PNV_FDT_ADDR 0x01000000 #define PNV_TIMEBASE_FREQ 512000000ULL