hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
Make the minor tweaks to interrupt numbering used by the NVIC a runtime setting rather than a compile time one, so we can drop more NVIC ifdefs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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hw/arm_gic.c
12
hw/arm_gic.c
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@ -36,13 +36,9 @@ do { printf("arm_gic: " fmt , ## __VA_ARGS__); } while (0)
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#define DPRINTF(fmt, ...) do {} while(0)
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#endif
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#ifdef NVIC
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/* The NVIC has 16 internal vectors. However these are not exposed
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through the normal GIC interface. */
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#define GIC_BASE_IRQ 32
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#else
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#define GIC_BASE_IRQ 0
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#endif
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#define GIC_BASE_IRQ ((s->revision == REV_NVIC) ? 32 : 0)
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static const uint8_t gic_id[] = {
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0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
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@ -839,7 +835,6 @@ static void gic_init(gic_state *s, int num_irq)
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}
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i = s->num_irq - GIC_INTERNAL;
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#ifndef NVIC
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/* For the GIC, also expose incoming GPIO lines for PPIs for each CPU.
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* GPIO array layout is thus:
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* [0..N-1] SPIs
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@ -847,8 +842,9 @@ static void gic_init(gic_state *s, int num_irq)
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* [N+32..N+63] PPIs for CPU 1
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* ...
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*/
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i += (GIC_INTERNAL * s->num_cpu);
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#endif
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if (s->revision != REV_NVIC) {
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i += (GIC_INTERNAL * s->num_cpu);
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}
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qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, i);
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for (i = 0; i < NUM_CPU(s); i++) {
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sysbus_init_irq(&s->busdev, &s->parent_irq[i]);
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