tests/tcg: target/mips: Add wrappers for MSA bit counting instructions
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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tests/tcg/mips/include/wrappers_msa.h
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tests/tcg/mips/include/wrappers_msa.h
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/*
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* Header file for wrappers around MSA instructions assembler invocations
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*
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* Copyright (C) 2018 Wave Computing, Inc.
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* Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#ifndef WRAPPERS_MSA_H
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#define WRAPPERS_MSA_H
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#define DO_MSA__WD__WS(suffix, mnemonic) \
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static inline void do_msa_##suffix(void *input, void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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#mnemonic " $w10, $w11\n\t" \
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"move $t0, %1\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input), "r" (output) \
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: "t0", "memory" \
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); \
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}
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DO_MSA__WD__WS(NLOC_B, nloc.b)
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DO_MSA__WD__WS(NLOC_H, nloc.h)
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DO_MSA__WD__WS(NLOC_W, nloc.w)
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DO_MSA__WD__WS(NLOC_D, nloc.d)
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DO_MSA__WD__WS(NLZC_B, nlzc.b)
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DO_MSA__WD__WS(NLZC_H, nlzc.h)
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DO_MSA__WD__WS(NLZC_W, nlzc.w)
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DO_MSA__WD__WS(NLZC_D, nlzc.d)
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DO_MSA__WD__WS(PCNT_B, pcnt.b)
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DO_MSA__WD__WS(PCNT_H, pcnt.h)
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DO_MSA__WD__WS(PCNT_W, pcnt.w)
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DO_MSA__WD__WS(PCNT_D, pcnt.d)
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#endif
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