target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()
To run a VM in 32-bit EL1 our AArch32 interrupt handling code needs to be able to cope with VIRQ and VFIQ exceptions. These behave like IRQ and FIQ except that we don't need to try to route them to Monitor mode. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
parent
eca2721385
commit
87a4b27034
|
@ -6399,6 +6399,20 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
|
|||
}
|
||||
offset = 4;
|
||||
break;
|
||||
case EXCP_VIRQ:
|
||||
new_mode = ARM_CPU_MODE_IRQ;
|
||||
addr = 0x18;
|
||||
/* Disable IRQ and imprecise data aborts. */
|
||||
mask = CPSR_A | CPSR_I;
|
||||
offset = 4;
|
||||
break;
|
||||
case EXCP_VFIQ:
|
||||
new_mode = ARM_CPU_MODE_FIQ;
|
||||
addr = 0x1c;
|
||||
/* Disable FIQ, IRQ and imprecise data aborts. */
|
||||
mask = CPSR_A | CPSR_I | CPSR_F;
|
||||
offset = 4;
|
||||
break;
|
||||
case EXCP_SMC:
|
||||
new_mode = ARM_CPU_MODE_MON;
|
||||
addr = 0x08;
|
||||
|
|
Loading…
Reference in a new issue