stm32f205: Rename 'nvic' local to 'armv7m'
The local variable 'nvic' in stm32f205_soc_realize() no longer holds a direct pointer to the NVIC device; it is a pointer to the ARMv7M container object. Rename it 'armv7m' accordingly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487604965-23220-12-git-send-email-peter.maydell@linaro.org
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@ -85,7 +85,7 @@ static void stm32f205_soc_initfn(Object *obj)
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static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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{
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STM32F205State *s = STM32F205_SOC(dev_soc);
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DeviceState *dev, *nvic;
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DeviceState *dev, *armv7m;
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SysBusDevice *busdev;
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Error *err = NULL;
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int i;
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@ -113,9 +113,9 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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vmstate_register_ram_global(sram);
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memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
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nvic = DEVICE(&s->armv7m);
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qdev_prop_set_uint32(nvic, "num-irq", 96);
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qdev_prop_set_string(nvic, "cpu-model", s->cpu_model);
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armv7m = DEVICE(&s->armv7m);
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qdev_prop_set_uint32(armv7m, "num-irq", 96);
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qdev_prop_set_string(armv7m, "cpu-model", s->cpu_model);
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object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
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"memory", &error_abort);
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object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
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@ -133,7 +133,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, 0x40013800);
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, 71));
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
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/* Attach UART (uses USART registers) and USART controllers */
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for (i = 0; i < STM_NUM_USARTS; i++) {
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@ -147,7 +147,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, usart_addr[i]);
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, usart_irq[i]));
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, usart_irq[i]));
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}
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/* Timer 2 to 5 */
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@ -161,7 +161,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, timer_addr[i]);
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, timer_irq[i]));
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, timer_irq[i]));
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}
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/* ADC 1 to 3 */
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@ -173,7 +173,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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return;
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}
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qdev_connect_gpio_out(DEVICE(s->adc_irqs), 0,
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qdev_get_gpio_in(nvic, ADC_IRQ));
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qdev_get_gpio_in(armv7m, ADC_IRQ));
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for (i = 0; i < STM_NUM_ADCS; i++) {
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dev = DEVICE(&(s->adc[i]));
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@ -198,7 +198,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
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}
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(busdev, 0, spi_addr[i]);
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, spi_irq[i]));
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sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, spi_irq[i]));
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}
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}
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