ahci: Clean up reset functions
Properly register reset functions via the device class. CC: Alexander Graf <agraf@suse.de> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -339,7 +339,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr,
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case HOST_CTL: /* R/W */
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case HOST_CTL: /* R/W */
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if (val & HOST_CTL_RESET) {
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if (val & HOST_CTL_RESET) {
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DPRINTF(-1, "HBA Reset\n");
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DPRINTF(-1, "HBA Reset\n");
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ahci_reset(container_of(s, AHCIPCIState, ahci));
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ahci_reset(s);
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} else {
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} else {
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s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN;
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s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN;
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ahci_check_irq(s);
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ahci_check_irq(s);
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@ -1149,21 +1149,20 @@ void ahci_uninit(AHCIState *s)
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g_free(s->dev);
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g_free(s->dev);
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}
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}
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void ahci_reset(void *opaque)
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void ahci_reset(AHCIState *s)
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{
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{
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struct AHCIPCIState *d = opaque;
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AHCIPortRegs *pr;
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AHCIPortRegs *pr;
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int i;
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int i;
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d->ahci.control_regs.irqstatus = 0;
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s->control_regs.irqstatus = 0;
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d->ahci.control_regs.ghc = 0;
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s->control_regs.ghc = 0;
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for (i = 0; i < d->ahci.ports; i++) {
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for (i = 0; i < s->ports; i++) {
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pr = &d->ahci.dev[i].port_regs;
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pr = &s->dev[i].port_regs;
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pr->irq_stat = 0;
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pr->irq_stat = 0;
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pr->irq_mask = 0;
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pr->irq_mask = 0;
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pr->scr_ctl = 0;
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pr->scr_ctl = 0;
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ahci_reset_port(&d->ahci, i);
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ahci_reset_port(s, i);
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}
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}
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}
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}
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@ -1178,6 +1177,13 @@ static const VMStateDescription vmstate_sysbus_ahci = {
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.unmigratable = 1,
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.unmigratable = 1,
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};
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};
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static void sysbus_ahci_reset(DeviceState *dev)
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{
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SysbusAHCIState *s = DO_UPCAST(SysbusAHCIState, busdev.qdev, dev);
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ahci_reset(&s->ahci);
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}
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static int sysbus_ahci_init(SysBusDevice *dev)
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static int sysbus_ahci_init(SysBusDevice *dev)
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{
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{
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SysbusAHCIState *s = FROM_SYSBUS(SysbusAHCIState, dev);
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SysbusAHCIState *s = FROM_SYSBUS(SysbusAHCIState, dev);
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@ -1185,8 +1191,6 @@ static int sysbus_ahci_init(SysBusDevice *dev)
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sysbus_init_mmio(dev, &s->ahci.mem);
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sysbus_init_mmio(dev, &s->ahci.mem);
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sysbus_init_irq(dev, &s->ahci.irq);
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sysbus_init_irq(dev, &s->ahci.irq);
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qemu_register_reset(ahci_reset, &s->ahci);
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return 0;
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return 0;
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}
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}
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@ -1203,6 +1207,7 @@ static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
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sbc->init = sysbus_ahci_init;
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sbc->init = sysbus_ahci_init;
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dc->vmsd = &vmstate_sysbus_ahci;
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dc->vmsd = &vmstate_sysbus_ahci;
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dc->props = sysbus_ahci_properties;
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dc->props = sysbus_ahci_properties;
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dc->reset = sysbus_ahci_reset;
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}
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}
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static TypeInfo sysbus_ahci_info = {
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static TypeInfo sysbus_ahci_info = {
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@ -332,6 +332,6 @@ typedef struct NCQFrame {
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void ahci_init(AHCIState *s, DeviceState *qdev, int ports);
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void ahci_init(AHCIState *s, DeviceState *qdev, int ports);
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void ahci_uninit(AHCIState *s);
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void ahci_uninit(AHCIState *s);
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void ahci_reset(void *opaque);
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void ahci_reset(AHCIState *s);
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#endif /* HW_IDE_AHCI_H */
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#endif /* HW_IDE_AHCI_H */
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10
hw/ide/ich.c
10
hw/ide/ich.c
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@ -84,12 +84,12 @@ static const VMStateDescription vmstate_ahci = {
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.unmigratable = 1,
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.unmigratable = 1,
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};
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};
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static void pci_ich9_reset(void *opaque)
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static void pci_ich9_reset(DeviceState *dev)
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{
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{
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struct AHCIPCIState *d = opaque;
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struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev);
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msi_reset(&d->card);
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msi_reset(&d->card);
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ahci_reset(opaque);
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ahci_reset(&d->ahci);
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}
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}
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static int pci_ich9_ahci_init(PCIDevice *dev)
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static int pci_ich9_ahci_init(PCIDevice *dev)
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@ -110,8 +110,6 @@ static int pci_ich9_ahci_init(PCIDevice *dev)
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/* XXX Software should program this register */
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/* XXX Software should program this register */
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d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */
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d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */
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qemu_register_reset(pci_ich9_reset, d);
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msi_init(dev, 0x50, 1, true, false);
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msi_init(dev, 0x50, 1, true, false);
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d->ahci.irq = d->card.irq[0];
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d->ahci.irq = d->card.irq[0];
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@ -141,7 +139,6 @@ static int pci_ich9_uninit(PCIDevice *dev)
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d = DO_UPCAST(struct AHCIPCIState, card, dev);
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d = DO_UPCAST(struct AHCIPCIState, card, dev);
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msi_uninit(dev);
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msi_uninit(dev);
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qemu_unregister_reset(pci_ich9_reset, d);
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ahci_uninit(&d->ahci);
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ahci_uninit(&d->ahci);
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return 0;
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return 0;
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@ -167,6 +164,7 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data)
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k->revision = 0x02;
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k->revision = 0x02;
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k->class_id = PCI_CLASS_STORAGE_SATA;
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k->class_id = PCI_CLASS_STORAGE_SATA;
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dc->vmsd = &vmstate_ahci;
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dc->vmsd = &vmstate_ahci;
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dc->reset = pci_ich9_reset;
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}
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}
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static TypeInfo ich_ahci_info = {
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static TypeInfo ich_ahci_info = {
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