target-ppc: Add xxextractuw instruction
xxextractuw: VSX Vector Extract Unsigned Word Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
0f358a0710
commit
8ad901e558
|
@ -535,6 +535,7 @@ DEF_HELPER_2(xvrspip, void, env, i32)
|
|||
DEF_HELPER_2(xvrspiz, void, env, i32)
|
||||
DEF_HELPER_2(xxperm, void, env, i32)
|
||||
DEF_HELPER_2(xxpermr, void, env, i32)
|
||||
DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32)
|
||||
|
||||
DEF_HELPER_2(efscfsi, i32, env, i32)
|
||||
DEF_HELPER_2(efscfui, i32, env, i32)
|
||||
|
|
|
@ -2001,6 +2001,32 @@ VEXTRACT(uw, u32)
|
|||
VEXTRACT(d, u64)
|
||||
#undef VEXTRACT
|
||||
|
||||
void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
|
||||
target_ulong xbn, uint32_t index)
|
||||
{
|
||||
ppc_vsr_t xt, xb;
|
||||
size_t es = sizeof(uint32_t);
|
||||
uint32_t ext_index;
|
||||
int i;
|
||||
|
||||
getVSR(xbn, &xb, env);
|
||||
memset(&xt, 0, sizeof(xt));
|
||||
|
||||
#if defined(HOST_WORDS_BIGENDIAN)
|
||||
ext_index = index;
|
||||
for (i = 0; i < es; i++, ext_index++) {
|
||||
xt.u8[8 - es + i] = xb.u8[ext_index % 16];
|
||||
}
|
||||
#else
|
||||
ext_index = 15 - index;
|
||||
for (i = es - 1; i >= 0; i--, ext_index--) {
|
||||
xt.u8[8 + i] = xb.u8[ext_index % 16];
|
||||
}
|
||||
#endif
|
||||
|
||||
putVSR(xtn, &xt, env);
|
||||
}
|
||||
|
||||
#define VEXT_SIGNED(name, element, mask, cast, recast) \
|
||||
void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
|
||||
{ \
|
||||
|
|
|
@ -1180,6 +1180,36 @@ static void gen_xxsldwi(DisasContext *ctx)
|
|||
tcg_temp_free_i64(xtl);
|
||||
}
|
||||
|
||||
#define VSX_EXTRACT(name) \
|
||||
static void gen_##name(DisasContext *ctx) \
|
||||
{ \
|
||||
TCGv xt, xb; \
|
||||
TCGv_i32 t0 = tcg_temp_new_i32(); \
|
||||
uint8_t uimm = UIMM4(ctx->opcode); \
|
||||
\
|
||||
if (unlikely(!ctx->vsx_enabled)) { \
|
||||
gen_exception(ctx, POWERPC_EXCP_VSXU); \
|
||||
return; \
|
||||
} \
|
||||
xt = tcg_const_tl(xT(ctx->opcode)); \
|
||||
xb = tcg_const_tl(xB(ctx->opcode)); \
|
||||
/* uimm > 15 out of bound and for \
|
||||
* uimm > 12 handle as per hardware in helper \
|
||||
*/ \
|
||||
if (uimm > 15) { \
|
||||
tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), 0); \
|
||||
tcg_gen_movi_i64(cpu_vsrl(xT(ctx->opcode)), 0); \
|
||||
return; \
|
||||
} \
|
||||
tcg_gen_movi_i32(t0, uimm); \
|
||||
gen_helper_##name(cpu_env, xt, xb, t0); \
|
||||
tcg_temp_free(xb); \
|
||||
tcg_temp_free(xt); \
|
||||
tcg_temp_free_i32(t0); \
|
||||
}
|
||||
|
||||
VSX_EXTRACT(xxextractuw)
|
||||
|
||||
#undef GEN_XX2FORM
|
||||
#undef GEN_XX3FORM
|
||||
#undef GEN_XX2IFORM
|
||||
|
|
|
@ -49,6 +49,10 @@ GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
|
|||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2FORM_EXT(name, opc2, opc3, fl2) \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0x00100000, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0x00100000, PPC_NONE, fl2)
|
||||
|
||||
#define GEN_XX2FORM_EO(name, opc2, opc3, opc4, fl2) \
|
||||
GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 0, opc3, opc4, 0, PPC_NONE, fl2), \
|
||||
GEN_HANDLER2_E_2(name, #name, 0x3C, opc2 | 1, opc3, opc4, 0, PPC_NONE, fl2)
|
||||
|
@ -280,6 +284,7 @@ GEN_XX3FORM(xxpermr, 0x08, 0x07, PPC2_ISA300),
|
|||
GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),
|
||||
GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300),
|
||||
GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),
|
||||
GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300),
|
||||
|
||||
#define GEN_XXSEL_ROW(opc3) \
|
||||
GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \
|
||||
|
|
Loading…
Reference in a new issue