tcg-aarch64: Use intptr_t apropriately
As opposed to tcg_target_long. Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -497,7 +497,7 @@ static void tcg_out_insn_3509(TCGContext *s, AArch64Insn insn, TCGType ext,
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static inline void tcg_out_ldst_9(TCGContext *s,
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enum aarch64_ldst_op_data op_data,
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enum aarch64_ldst_op_type op_type,
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TCGReg rd, TCGReg rn, tcg_target_long offset)
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TCGReg rd, TCGReg rn, intptr_t offset)
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{
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/* use LDUR with BASE register with 9bit signed unscaled offset */
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tcg_out32(s, op_data << 24 | op_type << 20
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@ -566,7 +566,7 @@ static inline void tcg_out_ldst_r(TCGContext *s,
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/* solve the whole ldst problem */
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static inline void tcg_out_ldst(TCGContext *s, enum aarch64_ldst_op_data data,
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enum aarch64_ldst_op_type type,
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TCGReg rd, TCGReg rn, tcg_target_long offset)
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TCGReg rd, TCGReg rn, intptr_t offset)
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{
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if (offset >= -256 && offset < 256) {
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tcg_out_ldst_9(s, data, type, rd, rn, offset);
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@ -954,9 +954,9 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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tcg_out_movr(s, 1, TCG_REG_X0, TCG_AREG0);
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tcg_out_movr(s, (TARGET_LONG_BITS == 64), TCG_REG_X1, lb->addrlo_reg);
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X2, lb->mem_index);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_X3, (tcg_target_long)lb->raddr);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_X3, (intptr_t)lb->raddr);
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP,
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(tcg_target_long)qemu_ld_helpers[lb->opc & 3]);
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(intptr_t)qemu_ld_helpers[lb->opc & 3]);
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tcg_out_callr(s, TCG_REG_TMP);
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if (lb->opc & 0x04) {
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tcg_out_sxt(s, 1, lb->opc & 3, lb->datalo_reg, TCG_REG_X0);
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@ -979,7 +979,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP,
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(intptr_t)qemu_st_helpers[lb->opc & 3]);
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tcg_out_callr(s, TCG_REG_TMP);
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tcg_out_goto(s, (tcg_target_long)lb->raddr);
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tcg_out_goto(s, (intptr_t)lb->raddr);
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}
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static void add_qemu_ldst_label(TCGContext *s, int is_ld, int opc,
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