i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
IA32_PRED_CMD MSR gives software a way to issue commands that affect the state of indirect branch predictors. Enumerated by CPUID.(EAX=7H,ECX=0):EDX[26]. IA32_ARCH_CAPABILITIES MSR enumerates architectural features of RDCL_NO and IBRS_ALL. Enumerated by CPUID.(EAX=07H, ECX=0):EDX[29]. https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> Message-Id: <1530781798-183214-2-git-send-email-robert.hu@linux.intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -354,6 +354,8 @@ typedef enum X86Seg {
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#define MSR_TSC_ADJUST 0x0000003b
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#define MSR_IA32_SPEC_CTRL 0x48
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#define MSR_VIRT_SSBD 0xc001011f
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#define MSR_IA32_PRED_CMD 0x49
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#define MSR_IA32_ARCH_CAPABILITIES 0x10a
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#define MSR_IA32_TSCDEADLINE 0x6e0
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#define FEATURE_CONTROL_LOCKED (1<<0)
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