target/arm: Convert T16, Unconditional branch
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-67-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -266,3 +266,9 @@ LDM_t16 1011 110 ......... \
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SVC 1101 1111 imm:8 &i
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B_cond_thumb 1101 cond:4 ........ &ci imm=%imm8_0x2
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}
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# Unconditional Branch
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%imm11_0x2 0:s11 !function=times_2
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B 11100 ........... &i imm=%imm11_0x2
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@ -10736,7 +10736,6 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
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static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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{
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uint32_t val;
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int32_t offset;
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TCGv_i32 tmp;
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TCGv_i32 tmp2;
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@ -10780,12 +10779,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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gen_bx(s, tmp);
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break;
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}
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/* unconditional branch */
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val = read_pc(s);
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offset = ((int32_t)insn << 21) >> 21;
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val += offset << 1;
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gen_jmp(s, val);
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break;
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/* unconditional branch, in decodetree */
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goto illegal_op;
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case 15:
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/* thumb_insn_is_16bit() ensures we can't get here for
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