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target/arm: Convert T16, Unconditional branch

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-67-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-09-04 12:30:56 -07:00 committed by Peter Maydell
parent 46beb58efb
commit 8d4a4dc849
2 changed files with 8 additions and 7 deletions
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6
target/arm/t16.decode
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@ -266,3 +266,9 @@ LDM_t16 1011 110 ......... \
SVC 1101 1111 imm:8 &i
B_cond_thumb 1101 cond:4 ........ &ci imm=%imm8_0x2
}
# Unconditional Branch
%imm11_0x2 0:s11 !function=times_2
B 11100 ........... &i imm=%imm11_0x2

9
target/arm/translate.c
View file

@ -10736,7 +10736,6 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
uint32_t val;
int32_t offset;
TCGv_i32 tmp;
TCGv_i32 tmp2;
@ -10780,12 +10779,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
gen_bx(s, tmp);
break;
}
/* unconditional branch */
val = read_pc(s);
offset = ((int32_t)insn << 21) >> 21;
val += offset << 1;
gen_jmp(s, val);
break;
/* unconditional branch, in decodetree */
goto illegal_op;
case 15:
/* thumb_insn_is_16bit() ensures we can't get here for