RISC-V: Fixes to CSR_* register macros.
This adds some missing CSR_* register macros, and documents some as being priv v1.9.1 specific. Signed-off-by: Jim Wilson <jimw@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190212230830.9160-1-jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -135,16 +135,22 @@
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/* Legacy Counter Setup (priv v1.9.1) */
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#define CSR_MUCOUNTEREN 0x320
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#define CSR_MSCOUNTEREN 0x321
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#define CSR_MHCOUNTEREN 0x322
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/* Machine Trap Handling */
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#define CSR_MSCRATCH 0x340
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#define CSR_MEPC 0x341
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#define CSR_MCAUSE 0x342
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#define CSR_MBADADDR 0x343
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#define CSR_MTVAL 0x343
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#define CSR_MIP 0x344
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/* Legacy Machine Trap Handling (priv v1.9.1) */
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#define CSR_MBADADDR 0x343
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/* Supervisor Trap Setup */
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#define CSR_SSTATUS 0x100
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#define CSR_SEDELEG 0x102
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#define CSR_SIDELEG 0x103
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#define CSR_SIE 0x104
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#define CSR_STVEC 0x105
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#define CSR_SCOUNTEREN 0x106
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@ -153,9 +159,12 @@
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#define CSR_SSCRATCH 0x140
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#define CSR_SEPC 0x141
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#define CSR_SCAUSE 0x142
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#define CSR_SBADADDR 0x143
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#define CSR_STVAL 0x143
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#define CSR_SIP 0x144
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/* Legacy Supervisor Trap Handling (priv v1.9.1) */
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#define CSR_SBADADDR 0x143
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/* Supervisor Protection and Translation */
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#define CSR_SPTBR 0x180
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#define CSR_SATP 0x180
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@ -282,6 +291,28 @@
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#define CSR_MHPMCOUNTER30H 0xb9e
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#define CSR_MHPMCOUNTER31H 0xb9f
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/* Legacy Hypervisor Trap Setup (priv v1.9.1) */
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#define CSR_HSTATUS 0x200
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#define CSR_HEDELEG 0x202
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#define CSR_HIDELEG 0x203
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#define CSR_HIE 0x204
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#define CSR_HTVEC 0x205
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/* Legacy Hypervisor Trap Handling (priv v1.9.1) */
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#define CSR_HSCRATCH 0x240
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#define CSR_HEPC 0x241
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#define CSR_HCAUSE 0x242
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#define CSR_HBADADDR 0x243
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#define CSR_HIP 0x244
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/* Legacy Machine Protection and Translation (priv v1.9.1) */
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#define CSR_MBASE 0x380
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#define CSR_MBOUND 0x381
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#define CSR_MIBASE 0x382
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#define CSR_MIBOUND 0x383
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#define CSR_MDBASE 0x384
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#define CSR_MDBOUND 0x385
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/* mstatus CSR bits */
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#define MSTATUS_UIE 0x00000001
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#define MSTATUS_SIE 0x00000002
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