hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions
This was done in the virt & sifive_u codes, but sifive_e codes were missed. Remove the riscv_ prefix of the machine* and soc* functions. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1591625864-31494-2-git-send-email-bmeng.cn@gmail.com Message-Id: <1591625864-31494-2-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -75,7 +75,7 @@ static const struct MemmapEntry {
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[SIFIVE_E_DTIM] = { 0x80000000, 0x4000 }
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};
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static void riscv_sifive_e_init(MachineState *machine)
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static void sifive_e_machine_init(MachineState *machine)
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{
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const struct MemmapEntry *memmap = sifive_e_memmap;
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@ -147,7 +147,7 @@ static void sifive_e_machine_class_init(ObjectClass *oc, void *data)
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "RISC-V Board compatible with SiFive E SDK";
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mc->init = riscv_sifive_e_init;
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mc->init = sifive_e_machine_init;
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mc->max_cpus = 1;
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mc->default_cpu_type = SIFIVE_E_CPU;
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}
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@ -167,7 +167,7 @@ static void sifive_e_machine_init_register_types(void)
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type_init(sifive_e_machine_init_register_types)
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static void riscv_sifive_e_soc_init(Object *obj)
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static void sifive_e_soc_init(Object *obj)
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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SiFiveESoCState *s = RISCV_E_SOC(obj);
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@ -179,7 +179,7 @@ static void riscv_sifive_e_soc_init(Object *obj)
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TYPE_SIFIVE_GPIO);
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}
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static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
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static void sifive_e_soc_realize(DeviceState *dev, Error **errp)
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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const struct MemmapEntry *memmap = sifive_e_memmap;
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@ -262,26 +262,26 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
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&s->xip_mem);
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}
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static void riscv_sifive_e_soc_class_init(ObjectClass *oc, void *data)
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static void sifive_e_soc_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = riscv_sifive_e_soc_realize;
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dc->realize = sifive_e_soc_realize;
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/* Reason: Uses serial_hds in realize function, thus can't be used twice */
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dc->user_creatable = false;
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}
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static const TypeInfo riscv_sifive_e_soc_type_info = {
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static const TypeInfo sifive_e_soc_type_info = {
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.name = TYPE_RISCV_E_SOC,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(SiFiveESoCState),
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.instance_init = riscv_sifive_e_soc_init,
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.class_init = riscv_sifive_e_soc_class_init,
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.instance_init = sifive_e_soc_init,
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.class_init = sifive_e_soc_class_init,
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};
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static void riscv_sifive_e_soc_register_types(void)
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static void sifive_e_soc_register_types(void)
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{
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type_register_static(&riscv_sifive_e_soc_type_info);
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type_register_static(&sifive_e_soc_type_info);
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}
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type_init(riscv_sifive_e_soc_register_types)
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type_init(sifive_e_soc_register_types)
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