target/arm: Add support for restoring v8M additional state context
For v8M, exceptions from Secure to Non-Secure state will save callee-saved registers to the exception frame as well as the caller-saved registers. Add support for unstacking these registers in exception exit when necessary. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1506092407-26985-12-git-send-email-peter.maydell@linaro.org
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@ -6463,6 +6463,36 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
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"for destination state is UNPREDICTABLE\n");
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}
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/* Do we need to pop callee-saved registers? */
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if (return_to_secure &&
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((excret & R_V7M_EXCRET_ES_MASK) == 0 ||
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(excret & R_V7M_EXCRET_DCRS_MASK) == 0)) {
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uint32_t expected_sig = 0xfefa125b;
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uint32_t actual_sig = ldl_phys(cs->as, frameptr);
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if (expected_sig != actual_sig) {
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/* Take a SecureFault on the current stack */
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env->v7m.sfsr |= R_V7M_SFSR_INVIS_MASK;
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armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false);
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v7m_exception_taken(cpu, excret);
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qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on existing "
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"stackframe: failed exception return integrity "
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"signature check\n");
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return;
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}
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env->regs[4] = ldl_phys(cs->as, frameptr + 0x8);
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env->regs[5] = ldl_phys(cs->as, frameptr + 0xc);
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env->regs[6] = ldl_phys(cs->as, frameptr + 0x10);
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env->regs[7] = ldl_phys(cs->as, frameptr + 0x14);
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env->regs[8] = ldl_phys(cs->as, frameptr + 0x18);
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env->regs[9] = ldl_phys(cs->as, frameptr + 0x1c);
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env->regs[10] = ldl_phys(cs->as, frameptr + 0x20);
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env->regs[11] = ldl_phys(cs->as, frameptr + 0x24);
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frameptr += 0x28;
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}
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/* Pop registers. TODO: make these accesses use the correct
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* attributes and address space (S/NS, priv/unpriv) and handle
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* memory transaction failures.
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