hw/arm/armsse: Use an array for apb_ppc fields in the state structure
Convert the apb_ppc0 and apb_ppc1 fields in the ARMSSE state struct to use an array instead of two separate fields. We already had one place in the code that wanted to be able to refer to the PPC by index, and we're about to add more code like that. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-22-peter.maydell@linaro.org
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@ -291,8 +291,12 @@ static void armsse_init(Object *obj)
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}
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}
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object_initialize_child(obj, "secctl", &s->secctl, TYPE_IOTKIT_SECCTL);
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object_initialize_child(obj, "secctl", &s->secctl, TYPE_IOTKIT_SECCTL);
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object_initialize_child(obj, "apb-ppc0", &s->apb_ppc0, TYPE_TZ_PPC);
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object_initialize_child(obj, "apb-ppc1", &s->apb_ppc1, TYPE_TZ_PPC);
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for (i = 0; i < ARRAY_SIZE(s->apb_ppc); i++) {
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g_autofree char *name = g_strdup_printf("apb-ppc%d", i);
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object_initialize_child(obj, name, &s->apb_ppc[i], TYPE_TZ_PPC);
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}
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for (i = 0; i < info->sram_banks; i++) {
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for (i = 0; i < info->sram_banks; i++) {
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char *name = g_strdup_printf("mpc%d", i);
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char *name = g_strdup_printf("mpc%d", i);
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object_initialize_child(obj, name, &s->mpc[i], TYPE_TZ_MPC);
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object_initialize_child(obj, name, &s->mpc[i], TYPE_TZ_MPC);
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@ -739,7 +743,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer0), 0,
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer0), 0,
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armsse_get_common_irq_in(s, 3));
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armsse_get_common_irq_in(s, 3));
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer0), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer0), 0);
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object_property_set_link(OBJECT(&s->apb_ppc0), "port[0]", OBJECT(mr),
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object_property_set_link(OBJECT(&s->apb_ppc[0]), "port[0]", OBJECT(mr),
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&error_abort);
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&error_abort);
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qdev_connect_clock_in(DEVICE(&s->timer1), "pclk", s->mainclk);
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qdev_connect_clock_in(DEVICE(&s->timer1), "pclk", s->mainclk);
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@ -749,7 +753,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer1), 0,
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer1), 0,
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armsse_get_common_irq_in(s, 4));
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armsse_get_common_irq_in(s, 4));
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer1), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer1), 0);
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object_property_set_link(OBJECT(&s->apb_ppc0), "port[1]", OBJECT(mr),
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object_property_set_link(OBJECT(&s->apb_ppc[0]), "port[1]", OBJECT(mr),
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&error_abort);
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&error_abort);
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qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk);
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qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk);
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@ -759,7 +763,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->dualtimer), 0,
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->dualtimer), 0,
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armsse_get_common_irq_in(s, 5));
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armsse_get_common_irq_in(s, 5));
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dualtimer), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dualtimer), 0);
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object_property_set_link(OBJECT(&s->apb_ppc0), "port[2]", OBJECT(mr),
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object_property_set_link(OBJECT(&s->apb_ppc[0]), "port[2]", OBJECT(mr),
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&error_abort);
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&error_abort);
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if (info->has_mhus) {
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if (info->has_mhus) {
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@ -782,7 +786,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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}
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}
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port = g_strdup_printf("port[%d]", i + 3);
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port = g_strdup_printf("port[%d]", i + 3);
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mr = sysbus_mmio_get_region(mhu_sbd, 0);
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mr = sysbus_mmio_get_region(mhu_sbd, 0);
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object_property_set_link(OBJECT(&s->apb_ppc0), port, OBJECT(mr),
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object_property_set_link(OBJECT(&s->apb_ppc[0]), port, OBJECT(mr),
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&error_abort);
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&error_abort);
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g_free(port);
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g_free(port);
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@ -802,12 +806,12 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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}
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}
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}
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc0), errp)) {
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc[0]), errp)) {
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return;
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return;
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}
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}
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sbd_apb_ppc0 = SYS_BUS_DEVICE(&s->apb_ppc0);
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sbd_apb_ppc0 = SYS_BUS_DEVICE(&s->apb_ppc[0]);
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dev_apb_ppc0 = DEVICE(&s->apb_ppc0);
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dev_apb_ppc0 = DEVICE(&s->apb_ppc[0]);
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 0);
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 0);
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memory_region_add_subregion(&s->container, 0x40000000, mr);
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memory_region_add_subregion(&s->container, 0x40000000, mr);
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@ -917,16 +921,16 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->s32ktimer), 0,
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->s32ktimer), 0,
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armsse_get_common_irq_in(s, 2));
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armsse_get_common_irq_in(s, 2));
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->s32ktimer), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->s32ktimer), 0);
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object_property_set_link(OBJECT(&s->apb_ppc1), "port[0]", OBJECT(mr),
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object_property_set_link(OBJECT(&s->apb_ppc[1]), "port[0]", OBJECT(mr),
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&error_abort);
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&error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc1), errp)) {
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc[1]), errp)) {
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return;
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return;
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}
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}
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->apb_ppc1), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->apb_ppc[1]), 0);
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memory_region_add_subregion(&s->container, 0x4002f000, mr);
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memory_region_add_subregion(&s->container, 0x4002f000, mr);
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dev_apb_ppc1 = DEVICE(&s->apb_ppc1);
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dev_apb_ppc1 = DEVICE(&s->apb_ppc[1]);
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qdev_connect_gpio_out_named(dev_secctl, "apb_ppc1_nonsec", 0,
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qdev_connect_gpio_out_named(dev_secctl, "apb_ppc1_nonsec", 0,
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qdev_get_gpio_in_named(dev_apb_ppc1,
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qdev_get_gpio_in_named(dev_apb_ppc1,
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"cfg_nonsec", 0));
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"cfg_nonsec", 0));
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@ -1063,7 +1067,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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DeviceState *devs = DEVICE(&s->ppc_irq_splitter[i]);
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DeviceState *devs = DEVICE(&s->ppc_irq_splitter[i]);
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char *gpioname = g_strdup_printf("apb_ppc%d_irq_status",
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char *gpioname = g_strdup_printf("apb_ppc%d_irq_status",
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i - NUM_EXTERNAL_PPCS);
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i - NUM_EXTERNAL_PPCS);
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TZPPC *ppc = (i == NUM_EXTERNAL_PPCS) ? &s->apb_ppc0 : &s->apb_ppc1;
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TZPPC *ppc = &s->apb_ppc[i - NUM_EXTERNAL_PPCS];
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qdev_connect_gpio_out(devs, 0,
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qdev_connect_gpio_out(devs, 0,
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qdev_get_gpio_in_named(dev_secctl, gpioname, 0));
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qdev_get_gpio_in_named(dev_secctl, gpioname, 0));
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@ -124,8 +124,9 @@ OBJECT_DECLARE_TYPE(ARMSSE, ARMSSEClass,
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/* We have an IRQ splitter and an OR gate input for each external PPC
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/* We have an IRQ splitter and an OR gate input for each external PPC
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* and the 2 internal PPCs
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* and the 2 internal PPCs
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*/
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*/
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#define NUM_INTERNAL_PPCS 2
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#define NUM_EXTERNAL_PPCS (IOTS_NUM_AHB_EXP_PPC + IOTS_NUM_APB_EXP_PPC)
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#define NUM_EXTERNAL_PPCS (IOTS_NUM_AHB_EXP_PPC + IOTS_NUM_APB_EXP_PPC)
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#define NUM_PPCS (NUM_EXTERNAL_PPCS + 2)
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#define NUM_PPCS (NUM_EXTERNAL_PPCS + NUM_INTERNAL_PPCS)
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#define MAX_SRAM_BANKS 4
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#define MAX_SRAM_BANKS 4
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#if MAX_SRAM_BANKS > IOTS_NUM_MPC
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#if MAX_SRAM_BANKS > IOTS_NUM_MPC
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@ -152,8 +153,7 @@ struct ARMSSE {
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ARMv7MState armv7m[SSE_MAX_CPUS];
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ARMv7MState armv7m[SSE_MAX_CPUS];
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CPUClusterState cluster[SSE_MAX_CPUS];
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CPUClusterState cluster[SSE_MAX_CPUS];
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IoTKitSecCtl secctl;
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IoTKitSecCtl secctl;
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TZPPC apb_ppc0;
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TZPPC apb_ppc[NUM_INTERNAL_PPCS];
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TZPPC apb_ppc1;
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TZMPC mpc[IOTS_NUM_MPC];
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TZMPC mpc[IOTS_NUM_MPC];
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CMSDKAPBTimer timer0;
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CMSDKAPBTimer timer0;
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CMSDKAPBTimer timer1;
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CMSDKAPBTimer timer1;
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