target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state
Hoist the computation of some TBFLAG_A32 bits that only apply to M-profile under a single test for ARM_FEATURE_M. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191023150057.25731-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -11194,6 +11194,29 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
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if (arm_feature(env, ARM_FEATURE_M)) {
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flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
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if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
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FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S)
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!= env->v7m.secure) {
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flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
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}
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if ((env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) &&
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(!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) ||
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(env->v7m.secure &&
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!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) {
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/*
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* ASPEN is set, but FPCA/SFPA indicate that there is no
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* active FP context; we must create a new FP context before
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* executing any FP insn.
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*/
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flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1);
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}
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bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK;
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if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) {
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flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1);
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}
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} else {
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flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
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}
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@ -11233,32 +11256,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
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}
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}
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if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
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FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) {
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flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
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}
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if (arm_feature(env, ARM_FEATURE_M) &&
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(env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) &&
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(!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) ||
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(env->v7m.secure &&
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!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) {
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/*
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* ASPEN is set, but FPCA/SFPA indicate that there is no active
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* FP context; we must create a new FP context before executing
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* any FP insn.
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*/
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flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1);
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}
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if (arm_feature(env, ARM_FEATURE_M)) {
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bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK;
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if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) {
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flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1);
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}
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}
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if (!arm_feature(env, ARM_FEATURE_M)) {
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int target_el = arm_debug_target_el(env);
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