hw/arm/smmuv3: Fix decoding of ID register range
The SMMUv3 ID registers cover an area 0x30 bytes in size (12 registers, 4 bytes each). We were incorrectly decoding only the first 0x20 bytes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20190524124829.2589-1-peter.maydell@linaro.org
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@ -1232,7 +1232,7 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset,
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uint64_t *data, MemTxAttrs attrs)
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uint64_t *data, MemTxAttrs attrs)
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{
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{
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switch (offset) {
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switch (offset) {
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case A_IDREGS ... A_IDREGS + 0x1f:
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case A_IDREGS ... A_IDREGS + 0x2f:
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*data = smmuv3_idreg(offset - A_IDREGS);
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*data = smmuv3_idreg(offset - A_IDREGS);
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return MEMTX_OK;
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return MEMTX_OK;
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case A_IDR0 ... A_IDR5:
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case A_IDR0 ... A_IDR5:
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