target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour
ISA v3.0 radix guest execution has a quirk in AIL behaviour such that the LPCR[AIL] value can apply to hypervisor interrupts. This affects machines that emulate HV=1 mode (i.e., powernv9). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20210415054227.1793812-2-npiggin@gmail.com> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -791,14 +791,23 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
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#endif
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/*
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* AIL only works if there is no HV transition and we are running
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* with translations enabled
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* AIL only works if MSR[IR] and MSR[DR] are both enabled.
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*/
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if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1) ||
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((new_msr & MSR_HVB) && !(msr & MSR_HVB))) {
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if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1)) {
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ail = 0;
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}
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/*
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* AIL does not work if there is a MSR[HV] 0->1 transition and the
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* partition is in HPT mode. For radix guests, such interrupts are
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* allowed to be delivered to the hypervisor in ail mode.
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*/
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if ((new_msr & MSR_HVB) && !(msr & MSR_HVB)) {
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if (!(env->spr[SPR_LPCR] & LPCR_HR)) {
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ail = 0;
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}
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}
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vector = env->excp_vectors[excp];
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if (vector == (target_ulong)-1ULL) {
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cpu_abort(cs, "Raised an exception without defined vector %d\n",
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