From 9bcd41d41fb4fd9efbc2fd657a4a12c614e78412 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 14 Dec 2020 15:07:13 +0100 Subject: [PATCH] target/mips: Inline cpu_state_reset() in mips_cpu_reset() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201214183739.500368-2-f4bug@amsat.org> --- target/mips/cpu.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index cb70fb2b9b..77fb7366bf 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -105,10 +105,16 @@ static bool mips_cpu_has_work(CPUState *cs) #include "translate_init.c.inc" -/* TODO QOM'ify CPU reset and remove */ -static void cpu_state_reset(CPUMIPSState *env) +static void mips_cpu_reset(DeviceState *dev) { - CPUState *cs = env_cpu(env); + CPUState *cs = CPU(dev); + MIPSCPU *cpu = MIPS_CPU(cs); + MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu); + CPUMIPSState *env = &cpu->env; + + mcc->parent_reset(dev); + + memset(env, 0, offsetof(CPUMIPSState, end_reset_fields)); /* Reset registers to their default values */ env->CP0_PRid = env->cpu_model->CP0_PRid; @@ -331,20 +337,6 @@ static void cpu_state_reset(CPUMIPSState *env) /* UHI interface can be used to obtain argc and argv */ env->active_tc.gpr[4] = -1; } -} - -static void mips_cpu_reset(DeviceState *dev) -{ - CPUState *s = CPU(dev); - MIPSCPU *cpu = MIPS_CPU(s); - MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu); - CPUMIPSState *env = &cpu->env; - - mcc->parent_reset(dev); - - memset(env, 0, offsetof(CPUMIPSState, end_reset_fields)); - - cpu_state_reset(env); #ifndef CONFIG_USER_ONLY if (kvm_enabled()) {