usb-ohci: Add support for being a companion controller
To use as a companion controller, use pci-ohci as device and set the masterbus and num-ports properties, ie: -device usb-ehci,addr=0b.1,multifunction=on,id=ehci0 -device pci-ohci,addr=0b.0,multifunction=on,masterbus=ehci0.0,num-ports=4 Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -1716,8 +1716,9 @@ static USBPortOps ohci_port_ops = {
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static USBBusOps ohci_bus_ops = {
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static USBBusOps ohci_bus_ops = {
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};
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};
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static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
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static int usb_ohci_init(OHCIState *ohci, DeviceState *dev,
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int num_ports, uint32_t localmem_base)
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int num_ports, uint32_t localmem_base,
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char *masterbus, uint32_t firstport)
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{
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{
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int i;
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int i;
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@ -1737,38 +1738,58 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
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usb_frame_time, usb_bit_time);
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usb_frame_time, usb_bit_time);
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}
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}
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ohci->num_ports = num_ports;
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if (masterbus) {
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USBPort *ports[OHCI_MAX_PORTS];
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for(i = 0; i < num_ports; i++) {
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ports[i] = &ohci->rhport[i].port;
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}
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if (usb_register_companion(masterbus, ports, num_ports,
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firstport, ohci, &ohci_port_ops,
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USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL) != 0) {
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return -1;
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}
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} else {
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usb_bus_new(&ohci->bus, &ohci_bus_ops, dev);
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for (i = 0; i < num_ports; i++) {
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usb_register_port(&ohci->bus, &ohci->rhport[i].port,
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ohci, i, &ohci_port_ops,
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USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL);
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}
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}
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ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci,
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ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci,
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DEVICE_LITTLE_ENDIAN);
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DEVICE_LITTLE_ENDIAN);
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ohci->localmem_base = localmem_base;
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ohci->localmem_base = localmem_base;
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ohci->name = dev->info->name;
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ohci->name = dev->info->name;
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usb_bus_new(&ohci->bus, &ohci_bus_ops, dev);
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ohci->num_ports = num_ports;
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for (i = 0; i < num_ports; i++) {
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usb_register_port(&ohci->bus, &ohci->rhport[i].port, ohci, i, &ohci_port_ops,
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USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL);
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}
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ohci->async_td = 0;
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ohci->async_td = 0;
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qemu_register_reset(ohci_reset, ohci);
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qemu_register_reset(ohci_reset, ohci);
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return 0;
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}
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}
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typedef struct {
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typedef struct {
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PCIDevice pci_dev;
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PCIDevice pci_dev;
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OHCIState state;
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OHCIState state;
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char *masterbus;
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uint32_t num_ports;
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uint32_t firstport;
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} OHCIPCIState;
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} OHCIPCIState;
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static int usb_ohci_initfn_pci(struct PCIDevice *dev)
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static int usb_ohci_initfn_pci(struct PCIDevice *dev)
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{
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{
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OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, dev);
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OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, dev);
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int num_ports = 3;
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ohci->pci_dev.config[PCI_CLASS_PROG] = 0x10; /* OHCI */
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ohci->pci_dev.config[PCI_CLASS_PROG] = 0x10; /* OHCI */
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/* TODO: RST# value should be 0. */
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/* TODO: RST# value should be 0. */
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ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
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ohci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
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usb_ohci_init(&ohci->state, &dev->qdev, num_ports, 0);
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if (usb_ohci_init(&ohci->state, &dev->qdev, ohci->num_ports, 0,
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ohci->masterbus, ohci->firstport) != 0) {
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return -1;
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}
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ohci->state.irq = ohci->pci_dev.irq[0];
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ohci->state.irq = ohci->pci_dev.irq[0];
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/* TODO: avoid cast below by using dev */
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/* TODO: avoid cast below by using dev */
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@ -1792,7 +1813,8 @@ static int ohci_init_pxa(SysBusDevice *dev)
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{
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{
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OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
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OHCISysBusState *s = FROM_SYSBUS(OHCISysBusState, dev);
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usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset);
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/* Cannot fail as we pass NULL for masterbus */
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usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0);
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sysbus_init_irq(dev, &s->ohci.irq);
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sysbus_init_irq(dev, &s->ohci.irq);
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sysbus_init_mmio(dev, 0x1000, s->ohci.mem);
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sysbus_init_mmio(dev, 0x1000, s->ohci.mem);
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@ -1807,6 +1829,12 @@ static PCIDeviceInfo ohci_pci_info = {
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.vendor_id = PCI_VENDOR_ID_APPLE,
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.vendor_id = PCI_VENDOR_ID_APPLE,
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.device_id = PCI_DEVICE_ID_APPLE_IPID_USB,
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.device_id = PCI_DEVICE_ID_APPLE_IPID_USB,
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.class_id = PCI_CLASS_SERIAL_USB,
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.class_id = PCI_CLASS_SERIAL_USB,
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.qdev.props = (Property[]) {
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DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus),
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DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3),
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DEFINE_PROP_UINT32("firstport", OHCIPCIState, firstport, 0),
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DEFINE_PROP_END_OF_LIST(),
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},
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};
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};
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static SysBusDeviceInfo ohci_sysbus_info = {
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static SysBusDeviceInfo ohci_sysbus_info = {
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