qom: Less verbose object_initialize_child()

All users of object_initialize_child() pass the obvious child size
argument.  Almost all pass &error_abort and no properties.  Tiresome.

Rename object_initialize_child() to
object_initialize_child_with_props() to free the name.  New
convenience wrapper object_initialize_child() automates the size
argument, and passes &error_abort and no properties.

Rename object_initialize_childv() to
object_initialize_child_with_propsv() for consistency.

Convert callers with this Coccinelle script:

    @@
    expression parent, propname, type;
    expression child, size;
    symbol error_abort;
    @@
    -    object_initialize_child(parent, propname, OBJECT(child), size, type, &error_abort, NULL)
    +    object_initialize_child(parent, propname, child, size, type, &error_abort, NULL)

    @@
    expression parent, propname, type;
    expression child;
    symbol error_abort;
    @@
    -    object_initialize_child(parent, propname, child, sizeof(*child), type, &error_abort, NULL)
    +    object_initialize_child(parent, propname, child, type)

    @@
    expression parent, propname, type;
    expression child;
    symbol error_abort;
    @@
    -    object_initialize_child(parent, propname, &child, sizeof(child), type, &error_abort, NULL)
    +    object_initialize_child(parent, propname, &child, type)

    @@
    expression parent, propname, type;
    expression child, size, err;
    expression list props;
    @@
    -    object_initialize_child(parent, propname, child, size, type, err, props)
    +    object_initialize_child_with_props(parent, propname, child, size, type, err, props)

Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c.  Worked around by temporarily renaming the macro for
the spatch run.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
[Rebased: machine opentitan is new (commit fe0fe4735e)]
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-37-armbru@redhat.com>
This commit is contained in:
Markus Armbruster 2020-06-10 07:32:25 +02:00
parent 19dc7e977c
commit 9fc7fc4d39
51 changed files with 161 additions and 221 deletions

View file

@ -41,9 +41,8 @@ static void aw_a10_init(Object *obj)
{ {
AwA10State *s = AW_A10(obj); AwA10State *s = AW_A10(obj);
object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "cpu", &s->cpu,
ARM_CPU_TYPE_NAME("cortex-a8"), ARM_CPU_TYPE_NAME("cortex-a8"));
&error_abort, NULL);
sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
TYPE_AW_A10_PIC); TYPE_AW_A10_PIC);

View file

@ -194,9 +194,8 @@ static void allwinner_h3_init(Object *obj)
s->memmap = allwinner_h3_memmap; s->memmap = allwinner_h3_memmap;
for (int i = 0; i < AW_H3_NUM_CPUS; i++) { for (int i = 0; i < AW_H3_NUM_CPUS; i++) {
object_initialize_child(obj, "cpu[*]", &s->cpus[i], sizeof(s->cpus[i]), object_initialize_child(obj, "cpu[*]", &s->cpus[i],
ARM_CPU_TYPE_NAME("cortex-a7"), ARM_CPU_TYPE_NAME("cortex-a7"));
&error_abort, NULL);
} }
sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),

View file

@ -251,9 +251,7 @@ static void armsse_init(Object *obj)
char *name; char *name;
name = g_strdup_printf("cluster%d", i); name = g_strdup_printf("cluster%d", i);
object_initialize_child(obj, name, &s->cluster[i], object_initialize_child(obj, name, &s->cluster[i], TYPE_CPU_CLUSTER);
sizeof(s->cluster[i]), TYPE_CPU_CLUSTER,
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->cluster[i]), "cluster-id", i); qdev_prop_set_uint32(DEVICE(&s->cluster[i]), "cluster-id", i);
g_free(name); g_free(name);
@ -287,15 +285,13 @@ static void armsse_init(Object *obj)
g_free(name); g_free(name);
} }
object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate, object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate,
sizeof(s->mpc_irq_orgate), TYPE_OR_IRQ, TYPE_OR_IRQ);
&error_abort, NULL);
for (i = 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) { for (i = 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) {
char *name = g_strdup_printf("mpc-irq-splitter-%d", i); char *name = g_strdup_printf("mpc-irq-splitter-%d", i);
SplitIRQ *splitter = &s->mpc_irq_splitter[i]; SplitIRQ *splitter = &s->mpc_irq_splitter[i];
object_initialize_child(obj, name, splitter, sizeof(*splitter), object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ);
TYPE_SPLIT_IRQ, &error_abort, NULL);
g_free(name); g_free(name);
} }
sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0), sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0),
@ -375,21 +371,16 @@ static void armsse_init(Object *obj)
g_free(name); g_free(name);
} }
} }
object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, TYPE_OR_IRQ);
sizeof(s->nmi_orgate), TYPE_OR_IRQ,
&error_abort, NULL);
object_initialize_child(obj, "ppc-irq-orgate", &s->ppc_irq_orgate, object_initialize_child(obj, "ppc-irq-orgate", &s->ppc_irq_orgate,
sizeof(s->ppc_irq_orgate), TYPE_OR_IRQ, TYPE_OR_IRQ);
&error_abort, NULL);
object_initialize_child(obj, "sec-resp-splitter", &s->sec_resp_splitter, object_initialize_child(obj, "sec-resp-splitter", &s->sec_resp_splitter,
sizeof(s->sec_resp_splitter), TYPE_SPLIT_IRQ, TYPE_SPLIT_IRQ);
&error_abort, NULL);
for (i = 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) { for (i = 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) {
char *name = g_strdup_printf("ppc-irq-splitter-%d", i); char *name = g_strdup_printf("ppc-irq-splitter-%d", i);
SplitIRQ *splitter = &s->ppc_irq_splitter[i]; SplitIRQ *splitter = &s->ppc_irq_splitter[i];
object_initialize_child(obj, name, splitter, sizeof(*splitter), object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ);
TYPE_SPLIT_IRQ, &error_abort, NULL);
g_free(name); g_free(name);
} }
if (info->num_cpus > 1) { if (info->num_cpus > 1) {
@ -398,8 +389,7 @@ static void armsse_init(Object *obj)
char *name = g_strdup_printf("cpu-irq-splitter%d", i); char *name = g_strdup_printf("cpu-irq-splitter%d", i);
SplitIRQ *splitter = &s->cpu_irq_splitter[i]; SplitIRQ *splitter = &s->cpu_irq_splitter[i];
object_initialize_child(obj, name, splitter, sizeof(*splitter), object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ);
TYPE_SPLIT_IRQ, &error_abort, NULL);
g_free(name); g_free(name);
} }
} }

View file

@ -267,9 +267,7 @@ static void aspeed_machine_init(MachineState *machine)
4 * GiB); 4 * GiB);
memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); memory_region_add_subregion(&bmc->ram_container, 0, machine->ram);
object_initialize_child(OBJECT(machine), "soc", &bmc->soc, object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
sizeof(bmc->soc), amc->soc_name, &error_abort,
NULL);
sc = ASPEED_SOC_GET_CLASS(&bmc->soc); sc = ASPEED_SOC_GET_CLASS(&bmc->soc);

View file

@ -127,9 +127,7 @@ static void aspeed_soc_ast2600_init(Object *obj)
} }
for (i = 0; i < sc->num_cpus; i++) { for (i = 0; i < sc->num_cpus; i++) {
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type);
sizeof(s->cpu[i]), sc->cpu_type,
&error_abort, NULL);
} }
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);

View file

@ -142,9 +142,7 @@ static void aspeed_soc_init(Object *obj)
} }
for (i = 0; i < sc->num_cpus; i++) { for (i = 0; i < sc->num_cpus; i++) {
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type);
sizeof(s->cpu[i]), sc->cpu_type,
&error_abort, NULL);
} }
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);

View file

@ -53,8 +53,7 @@ static void bcm2836_init(Object *obj)
for (n = 0; n < BCM283X_NCPUS; n++) { for (n = 0; n < BCM283X_NCPUS; n++) {
object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
sizeof(s->cpu[n].core), info->cpu_type, info->cpu_type);
&error_abort, NULL);
} }
sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),

View file

@ -36,9 +36,7 @@ static void digic_init(Object *obj)
DigicState *s = DIGIC(obj); DigicState *s = DIGIC(obj);
int i; int i;
object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm946"));
ARM_CPU_TYPE_NAME("arm946"),
&error_abort, NULL);
for (i = 0; i < DIGIC4_NB_TIMERS; i++) { for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
#define DIGIC_TIMER_NAME_MLEN 11 #define DIGIC_TIMER_NAME_MLEN 11

View file

@ -482,8 +482,7 @@ static void exynos4210_init(Object *obj)
char *name = g_strdup_printf("pl330-irq-orgate%d", i); char *name = g_strdup_printf("pl330-irq-orgate%d", i);
qemu_or_irq *orgate = &s->pl330_irq_orgate[i]; qemu_or_irq *orgate = &s->pl330_irq_orgate[i];
object_initialize_child(obj, name, orgate, sizeof(*orgate), object_initialize_child(obj, name, orgate, TYPE_OR_IRQ);
TYPE_OR_IRQ, &error_abort, NULL);
g_free(name); g_free(name);
} }
} }

View file

@ -38,9 +38,7 @@ static void fsl_imx25_init(Object *obj)
FslIMX25State *s = FSL_IMX25(obj); FslIMX25State *s = FSL_IMX25(obj);
int i; int i;
object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926"));
ARM_CPU_TYPE_NAME("arm926"),
&error_abort, NULL);
sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic),
TYPE_IMX_AVIC); TYPE_IMX_AVIC);

View file

@ -33,9 +33,7 @@ static void fsl_imx31_init(Object *obj)
FslIMX31State *s = FSL_IMX31(obj); FslIMX31State *s = FSL_IMX31(obj);
int i; int i;
object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136"));
ARM_CPU_TYPE_NAME("arm1136"),
&error_abort, NULL);
sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic),
TYPE_IMX_AVIC); TYPE_IMX_AVIC);

View file

@ -43,9 +43,8 @@ static void fsl_imx6_init(Object *obj)
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i); snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), object_initialize_child(obj, name, &s->cpu[i],
ARM_CPU_TYPE_NAME("cortex-a9"), ARM_CPU_TYPE_NAME("cortex-a9"));
&error_abort, NULL);
} }
sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore), sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore),

View file

@ -34,8 +34,8 @@ static void fsl_imx6ul_init(Object *obj)
char name[NAME_SIZE]; char name[NAME_SIZE];
int i; int i;
object_initialize_child(obj, "cpu0", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "cpu0", &s->cpu,
ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort, NULL); ARM_CPU_TYPE_NAME("cortex-a7"));
/* /*
* A7MPCORE * A7MPCORE

View file

@ -38,9 +38,8 @@ static void fsl_imx7_init(Object *obj)
for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) { for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i); snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), object_initialize_child(obj, name, &s->cpu[i],
ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort, ARM_CPU_TYPE_NAME("cortex-a7"));
NULL);
} }
/* /*

View file

@ -73,8 +73,7 @@ static void imx25_pdk_init(MachineState *machine)
unsigned int alias_offset; unsigned int alias_offset;
int i; int i;
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25);
TYPE_FSL_IMX25, &error_abort, NULL);
object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);

View file

@ -71,8 +71,7 @@ static void kzm_init(MachineState *machine)
unsigned int alias_offset; unsigned int alias_offset;
unsigned int i; unsigned int i;
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31);
TYPE_FSL_IMX31, &error_abort, NULL);
object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);

View file

@ -414,9 +414,10 @@ static void mps2tz_common_init(MachineState *machine)
char *name = g_strdup_printf("mps2-irq-splitter%d", i); char *name = g_strdup_printf("mps2-irq-splitter%d", i);
SplitIRQ *splitter = &mms->cpu_irq_splitter[i]; SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
object_initialize_child(OBJECT(machine), name, object_initialize_child_with_props(OBJECT(machine), name,
splitter, sizeof(*splitter), splitter, sizeof(*splitter),
TYPE_SPLIT_IRQ, &error_fatal, NULL); TYPE_SPLIT_IRQ, &error_fatal,
NULL);
g_free(name); g_free(name);
object_property_set_int(OBJECT(splitter), 2, "num-lines", object_property_set_int(OBJECT(splitter), 2, "num-lines",
@ -436,9 +437,7 @@ static void mps2tz_common_init(MachineState *machine)
* lines, one for each of the PPCs we create here, plus one per MSC. * lines, one for each of the PPCs we create here, plus one per MSC.
*/ */
object_initialize_child(OBJECT(machine), "sec-resp-splitter", object_initialize_child(OBJECT(machine), "sec-resp-splitter",
&mms->sec_resp_splitter, &mms->sec_resp_splitter, TYPE_SPLIT_IRQ);
sizeof(mms->sec_resp_splitter),
TYPE_SPLIT_IRQ, &error_abort, NULL);
object_property_set_int(OBJECT(&mms->sec_resp_splitter), object_property_set_int(OBJECT(&mms->sec_resp_splitter),
ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc), ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc),
"num-lines", &error_fatal); "num-lines", &error_fatal);
@ -472,8 +471,7 @@ static void mps2tz_common_init(MachineState *machine)
* Create the OR gate for this. * Create the OR gate for this.
*/ */
object_initialize_child(OBJECT(mms), "uart-irq-orgate", object_initialize_child(OBJECT(mms), "uart-irq-orgate",
&mms->uart_irq_orgate, sizeof(mms->uart_irq_orgate), &mms->uart_irq_orgate, TYPE_OR_IRQ);
TYPE_OR_IRQ, &error_abort, NULL);
object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines", object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines",
&error_fatal); &error_fatal);
object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true, object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true,

View file

@ -404,9 +404,9 @@ static void musca_init(MachineState *machine)
char *name = g_strdup_printf("musca-irq-splitter%d", i); char *name = g_strdup_printf("musca-irq-splitter%d", i);
SplitIRQ *splitter = &mms->cpu_irq_splitter[i]; SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
object_initialize_child(OBJECT(machine), name, object_initialize_child_with_props(OBJECT(machine), name, splitter,
splitter, sizeof(*splitter), sizeof(*splitter), TYPE_SPLIT_IRQ,
TYPE_SPLIT_IRQ, &error_fatal, NULL); &error_fatal, NULL);
g_free(name); g_free(name);
object_property_set_int(OBJECT(splitter), 2, "num-lines", object_property_set_int(OBJECT(splitter), 2, "num-lines",
@ -424,10 +424,10 @@ static void musca_init(MachineState *machine)
* The sec_resp_cfg output from the SSE-200 must be split into multiple * The sec_resp_cfg output from the SSE-200 must be split into multiple
* lines, one for each of the PPCs we create here. * lines, one for each of the PPCs we create here.
*/ */
object_initialize_child(OBJECT(machine), "sec-resp-splitter", object_initialize_child_with_props(OBJECT(machine), "sec-resp-splitter",
&mms->sec_resp_splitter, &mms->sec_resp_splitter,
sizeof(mms->sec_resp_splitter), sizeof(mms->sec_resp_splitter),
TYPE_SPLIT_IRQ, &error_fatal, NULL); TYPE_SPLIT_IRQ, &error_fatal, NULL);
object_property_set_int(OBJECT(&mms->sec_resp_splitter), object_property_set_int(OBJECT(&mms->sec_resp_splitter),
ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal); ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal);

View file

@ -282,8 +282,8 @@ static void raspi_machine_init(MachineState *machine)
machine->ram, 0); machine->ram, 0);
/* Setup the SOC */ /* Setup the SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), object_initialize_child(OBJECT(machine), "soc", &s->soc,
board_soc_type(board_rev), &error_abort, NULL); board_soc_type(board_rev));
object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram)); object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram));
object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
&error_abort); &error_abort);

View file

@ -169,9 +169,9 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp)
} }
/* ADC device, the IRQs are ORed together */ /* ADC device, the IRQs are ORed together */
object_initialize_child(OBJECT(s), "adc-orirq", &s->adc_irqs, object_initialize_child_with_props(OBJECT(s), "adc-orirq", &s->adc_irqs,
sizeof(s->adc_irqs), TYPE_OR_IRQ, sizeof(s->adc_irqs), TYPE_OR_IRQ, &err,
&err, NULL); NULL);
if (err != NULL) { if (err != NULL) {
error_propagate(errp, err); error_propagate(errp, err);
return; return;

View file

@ -32,9 +32,8 @@ static void versal_create_apu_cpus(Versal *s)
for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) { for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) {
Object *obj; Object *obj;
object_initialize_child(OBJECT(s), "apu-cpu[*]", object_initialize_child(OBJECT(s), "apu-cpu[*]", &s->fpd.apu.cpu[i],
&s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[i]), XLNX_VERSAL_ACPU_TYPE);
XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL);
obj = OBJECT(&s->fpd.apu.cpu[i]); obj = OBJECT(&s->fpd.apu.cpu[i]);
object_property_set_int(obj, s->cfg.psci_conduit, object_property_set_int(obj, s->cfg.psci_conduit,
"psci-conduit", &error_abort); "psci-conduit", &error_abort);

View file

@ -116,8 +116,7 @@ static void xlnx_zcu102_init(MachineState *machine)
ram_size); ram_size);
} }
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP);
TYPE_XLNX_ZYNQMP, &error_abort, NULL);
object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
"ddr-ram", &error_abort); "ddr-ram", &error_abort);

View file

@ -187,17 +187,15 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
} }
object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster,
sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, TYPE_CPU_CLUSTER);
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1);
for (i = 0; i < num_rpus; i++) { for (i = 0; i < num_rpus; i++) {
char *name; char *name;
object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]",
&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), &s->rpu_cpu[i],
ARM_CPU_TYPE_NAME("cortex-r5f"), ARM_CPU_TYPE_NAME("cortex-r5f"));
&error_abort, NULL);
name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]));
if (strcmp(name, boot_cpu)) { if (strcmp(name, boot_cpu)) {
@ -230,15 +228,13 @@ static void xlnx_zynqmp_init(Object *obj)
int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
object_initialize_child(obj, "apu-cluster", &s->apu_cluster, object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, TYPE_CPU_CLUSTER);
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->apu_cluster), "cluster-id", 0); qdev_prop_set_uint32(DEVICE(&s->apu_cluster), "cluster-id", 0);
for (i = 0; i < num_apus; i++) { for (i = 0; i < num_apus; i++) {
object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]", object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]",
&s->apu_cpu[i], sizeof(s->apu_cpu[i]), &s->apu_cpu[i],
ARM_CPU_TYPE_NAME("cortex-a53"), ARM_CPU_TYPE_NAME("cortex-a53"));
&error_abort, NULL);
} }
sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),

View file

@ -136,8 +136,7 @@ static void serial_isa_initfn(Object *o)
{ {
ISASerialState *self = ISA_SERIAL(o); ISASerialState *self = ISA_SERIAL(o);
object_initialize_child(o, "serial", &self->state, sizeof(self->state), object_initialize_child(o, "serial", &self->state, TYPE_SERIAL);
TYPE_SERIAL, &error_abort, NULL);
} }
static const TypeInfo serial_isa_info = { static const TypeInfo serial_isa_info = {

View file

@ -187,9 +187,7 @@ static void multi_serial_init(Object *o)
size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev)); size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev));
for (i = 0; i < nports; i++) { for (i = 0; i < nports; i++) {
object_initialize_child(o, "serial[*]", &pms->state[i], object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL);
sizeof(pms->state[i]),
TYPE_SERIAL, &error_abort, NULL);
} }
} }

View file

@ -108,8 +108,7 @@ static void serial_pci_init(Object *o)
{ {
PCISerialState *ps = PCI_SERIAL(o); PCISerialState *ps = PCI_SERIAL(o);
object_initialize_child(o, "serial", &ps->state, sizeof(ps->state), object_initialize_child(o, "serial", &ps->state, TYPE_SERIAL);
TYPE_SERIAL, &error_abort, NULL);
} }
static const TypeInfo serial_pci_info = { static const TypeInfo serial_pci_info = {

View file

@ -1014,8 +1014,7 @@ static void serial_io_instance_init(Object *o)
{ {
SerialIO *sio = SERIAL_IO(o); SerialIO *sio = SERIAL_IO(o);
object_initialize_child(o, "serial", &sio->serial, sizeof(sio->serial), object_initialize_child(o, "serial", &sio->serial, TYPE_SERIAL);
TYPE_SERIAL, &error_abort, NULL);
qdev_alias_all_properties(DEVICE(&sio->serial), o); qdev_alias_all_properties(DEVICE(&sio->serial), o);
} }
@ -1148,8 +1147,7 @@ static void serial_mm_instance_init(Object *o)
{ {
SerialMM *smm = SERIAL_MM(o); SerialMM *smm = SERIAL_MM(o);
object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL);
TYPE_SERIAL, &error_abort, NULL);
qdev_alias_all_properties(DEVICE(&smm->serial), o); qdev_alias_all_properties(DEVICE(&smm->serial), o);
} }

View file

@ -348,8 +348,8 @@ BusState *sysbus_get_default(void)
void sysbus_init_child_obj(Object *parent, const char *childname, void *child, void sysbus_init_child_obj(Object *parent, const char *childname, void *child,
size_t childsize, const char *childtype) size_t childsize, const char *childtype)
{ {
object_initialize_child(parent, childname, child, childsize, childtype, object_initialize_child_with_props(parent, childname, child, childsize,
&error_abort, NULL); childtype, &error_abort, NULL);
qdev_set_parent_bus(DEVICE(child), sysbus_get_default()); qdev_set_parent_bus(DEVICE(child), sysbus_get_default());
} }

View file

@ -579,13 +579,10 @@ static void xilinx_axidma_init(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
object_initialize_child(OBJECT(s), "axistream-connected-target", object_initialize_child(OBJECT(s), "axistream-connected-target",
&s->rx_data_dev, sizeof(s->rx_data_dev), &s->rx_data_dev, TYPE_XILINX_AXI_DMA_DATA_STREAM);
TYPE_XILINX_AXI_DMA_DATA_STREAM, &error_abort,
NULL);
object_initialize_child(OBJECT(s), "axistream-control-connected-target", object_initialize_child(OBJECT(s), "axistream-control-connected-target",
&s->rx_control_dev, sizeof(s->rx_control_dev), &s->rx_control_dev,
TYPE_XILINX_AXI_DMA_CONTROL_STREAM, &error_abort, TYPE_XILINX_AXI_DMA_CONTROL_STREAM);
NULL);
object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, object_property_add_link(obj, "dma", TYPE_MEMORY_REGION,
(Object **)&s->dma_mr, (Object **)&s->dma_mr,
qdev_prop_allow_set_link_before_realize, qdev_prop_allow_set_link_before_realize,

View file

@ -1796,11 +1796,9 @@ static void pnv_xive_init(Object *obj)
PnvXive *xive = PNV_XIVE(obj); PnvXive *xive = PNV_XIVE(obj);
object_initialize_child(obj, "ipi_source", &xive->ipi_source, object_initialize_child(obj, "ipi_source", &xive->ipi_source,
sizeof(xive->ipi_source), TYPE_XIVE_SOURCE, TYPE_XIVE_SOURCE);
&error_abort, NULL);
object_initialize_child(obj, "end_source", &xive->end_source, object_initialize_child(obj, "end_source", &xive->end_source,
sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, TYPE_XIVE_END_SOURCE);
&error_abort, NULL);
} }
/* /*

View file

@ -272,12 +272,10 @@ static void spapr_xive_instance_init(Object *obj)
{ {
SpaprXive *xive = SPAPR_XIVE(obj); SpaprXive *xive = SPAPR_XIVE(obj);
object_initialize_child(obj, "source", &xive->source, sizeof(xive->source), object_initialize_child(obj, "source", &xive->source, TYPE_XIVE_SOURCE);
TYPE_XIVE_SOURCE, &error_abort, NULL);
object_initialize_child(obj, "end_source", &xive->end_source, object_initialize_child(obj, "end_source", &xive->end_source,
sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, TYPE_XIVE_END_SOURCE);
&error_abort, NULL);
/* Not connected to the KVM XIVE device */ /* Not connected to the KVM XIVE device */
xive->fd = -1; xive->fd = -1;

View file

@ -61,8 +61,7 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
{ {
XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu), object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU);
TYPE_MICROBLAZE_CPU, &error_abort, NULL);
sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
TYPE_XLNX_PMU_IO_INTC); TYPE_XLNX_PMU_IO_INTC);
@ -174,8 +173,8 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine)
pmu_ram); pmu_ram);
/* Create the PMU device */ /* Create the PMU device */
object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), object_initialize_child(OBJECT(machine), "pmu", pmu,
TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); TYPE_XLNX_ZYNQMP_PMU_SOC);
object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal);
/* Load the kernel */ /* Load the kernel */

View file

@ -98,8 +98,8 @@ static void macio_init_child_obj(MacIOState *s, const char *childname,
void *child, size_t childsize, void *child, size_t childsize,
const char *childtype) const char *childtype)
{ {
object_initialize_child(OBJECT(s), childname, child, childsize, childtype, object_initialize_child_with_props(OBJECT(s), childname, child, childsize,
&error_abort, NULL); childtype, &error_abort, NULL);
qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus));
} }
@ -351,8 +351,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err);
/* PMU */ /* PMU */
object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu), object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU);
TYPE_VIA_PMU, &error_abort, NULL);
object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
&error_abort); &error_abort);
qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
@ -370,8 +369,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp)
object_unparent(OBJECT(&ns->gpio)); object_unparent(OBJECT(&ns->gpio));
/* CUDA */ /* CUDA */
object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda), object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA);
TYPE_CUDA, &error_abort, NULL);
qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
s->frequency); s->frequency);

View file

@ -1020,13 +1020,10 @@ static void xilinx_enet_init(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
object_initialize_child(OBJECT(s), "axistream-connected-target", object_initialize_child(OBJECT(s), "axistream-connected-target",
&s->rx_data_dev, sizeof(s->rx_data_dev), &s->rx_data_dev, TYPE_XILINX_AXI_ENET_DATA_STREAM);
TYPE_XILINX_AXI_ENET_DATA_STREAM, &error_abort,
NULL);
object_initialize_child(OBJECT(s), "axistream-control-connected-target", object_initialize_child(OBJECT(s), "axistream-control-connected-target",
&s->rx_control_dev, sizeof(s->rx_control_dev), &s->rx_control_dev,
TYPE_XILINX_AXI_ENET_CONTROL_STREAM, &error_abort, TYPE_XILINX_AXI_ENET_CONTROL_STREAM);
NULL);
sysbus_init_irq(sbd, &s->irq); sysbus_init_irq(sbd, &s->irq);
memory_region_init_io(&s->iomem, OBJECT(s), &enet_ops, s, "enet", 0x40000); memory_region_init_io(&s->iomem, OBJECT(s), &enet_ops, s, "enet", 0x40000);

View file

@ -722,8 +722,7 @@ static void designware_pcie_host_init(Object *obj)
DesignwarePCIEHost *s = DESIGNWARE_PCIE_HOST(obj); DesignwarePCIEHost *s = DESIGNWARE_PCIE_HOST(obj);
DesignwarePCIERoot *root = &s->root; DesignwarePCIERoot *root = &s->root;
object_initialize_child(obj, "root", root, sizeof(*root), object_initialize_child(obj, "root", root, TYPE_DESIGNWARE_PCIE_ROOT);
TYPE_DESIGNWARE_PCIE_ROOT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false); qdev_prop_set_bit(DEVICE(root), "multifunction", false);
} }

View file

@ -124,8 +124,7 @@ static void gpex_host_initfn(Object *obj)
GPEXHost *s = GPEX_HOST(obj); GPEXHost *s = GPEX_HOST(obj);
GPEXRootState *root = &s->gpex_root; GPEXRootState *root = &s->gpex_root;
object_initialize_child(obj, "gpex_root", root, sizeof(*root), object_initialize_child(obj, "gpex_root", root, TYPE_GPEX_ROOT_DEVICE);
TYPE_GPEX_ROOT_DEVICE, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false); qdev_prop_set_bit(DEVICE(root), "multifunction", false);
} }

View file

@ -968,23 +968,19 @@ static void pnv_phb3_instance_init(Object *obj)
QLIST_INIT(&phb->dma_spaces); QLIST_INIT(&phb->dma_spaces);
/* LSI sources */ /* LSI sources */
object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis), object_initialize_child(obj, "lsi", &phb->lsis, TYPE_ICS);
TYPE_ICS, &error_abort, NULL);
/* Default init ... will be fixed by HW inits */ /* Default init ... will be fixed by HW inits */
phb->lsis.offset = 0; phb->lsis.offset = 0;
/* MSI sources */ /* MSI sources */
object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis), object_initialize_child(obj, "msi", &phb->msis, TYPE_PHB3_MSI);
TYPE_PHB3_MSI, &error_abort, NULL);
/* Power Bus Common Queue */ /* Power Bus Common Queue */
object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq), object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ);
TYPE_PNV_PBCQ, &error_abort, NULL);
/* Root Port */ /* Root Port */
object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PORT);
TYPE_PNV_PHB3_ROOT_PORT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false);
} }

View file

@ -1155,12 +1155,10 @@ static void pnv_phb4_instance_init(Object *obj)
QLIST_INIT(&phb->dma_spaces); QLIST_INIT(&phb->dma_spaces);
/* XIVE interrupt source object */ /* XIVE interrupt source object */
object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE);
TYPE_XIVE_SOURCE, &error_abort, NULL);
/* Root Port */ /* Root Port */
object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PORT);
TYPE_PNV_PHB4_ROOT_PORT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false);

View file

@ -370,8 +370,7 @@ static void pnv_pec_instance_init(Object *obj)
for (i = 0; i < PHB4_PEC_MAX_STACKS; i++) { for (i = 0; i < PHB4_PEC_MAX_STACKS; i++) {
object_initialize_child(obj, "stack[*]", &pec->stacks[i], object_initialize_child(obj, "stack[*]", &pec->stacks[i],
sizeof(pec->stacks[i]), TYPE_PNV_PHB4_PEC_STACK, TYPE_PNV_PHB4_PEC_STACK);
&error_abort, NULL);
} }
} }
@ -522,8 +521,7 @@ static void pnv_pec_stk_instance_init(Object *obj)
{ {
PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(obj); PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(obj);
object_initialize_child(obj, "phb", &stack->phb, sizeof(stack->phb), object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4);
TYPE_PNV_PHB4, &error_abort, NULL);
} }
static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) static void pnv_pec_stk_realize(DeviceState *dev, Error **errp)

View file

@ -212,8 +212,7 @@ static void q35_host_initfn(Object *obj)
memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb,
"pci-conf-data", 4); "pci-conf-data", 4);
object_initialize_child(OBJECT(s), "mch", &s->mch, sizeof(s->mch), object_initialize_child(OBJECT(s), "mch", &s->mch, TYPE_MCH_PCI_DEVICE);
TYPE_MCH_PCI_DEVICE, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false);
/* mch's object_initialize resets the default value, set it again */ /* mch's object_initialize resets the default value, set it again */

View file

@ -151,8 +151,7 @@ static void xilinx_pcie_host_init(Object *obj)
XilinxPCIEHost *s = XILINX_PCIE_HOST(obj); XilinxPCIEHost *s = XILINX_PCIE_HOST(obj);
XilinxPCIERoot *root = &s->root; XilinxPCIERoot *root = &s->root;
object_initialize_child(obj, "root", root, sizeof(*root), object_initialize_child(obj, "root", root, TYPE_XILINX_PCIE_ROOT);
TYPE_XILINX_PCIE_ROOT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false); qdev_prop_set_bit(DEVICE(root), "multifunction", false);
} }

View file

@ -1061,22 +1061,16 @@ static void pnv_chip_power8_instance_init(Object *obj)
object_property_allow_set_link, object_property_allow_set_link,
OBJ_PROP_LINK_STRONG); OBJ_PROP_LINK_STRONG);
object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi), object_initialize_child(obj, "psi", &chip8->psi, TYPE_PNV8_PSI);
TYPE_PNV8_PSI, &error_abort, NULL);
object_initialize_child(obj, "lpc", &chip8->lpc, sizeof(chip8->lpc), object_initialize_child(obj, "lpc", &chip8->lpc, TYPE_PNV8_LPC);
TYPE_PNV8_LPC, &error_abort, NULL);
object_initialize_child(obj, "occ", &chip8->occ, sizeof(chip8->occ), object_initialize_child(obj, "occ", &chip8->occ, TYPE_PNV8_OCC);
TYPE_PNV8_OCC, &error_abort, NULL);
object_initialize_child(obj, "homer", &chip8->homer, sizeof(chip8->homer), object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER);
TYPE_PNV8_HOMER, &error_abort, NULL);
for (i = 0; i < pcc->num_phbs; i++) { for (i = 0; i < pcc->num_phbs; i++) {
object_initialize_child(obj, "phb[*]", &chip8->phbs[i], object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB3);
sizeof(chip8->phbs[i]), TYPE_PNV_PHB3,
&error_abort, NULL);
} }
/* /*
@ -1320,22 +1314,17 @@ static void pnv_chip_power9_instance_init(Object *obj)
object_property_add_alias(obj, "xive-fabric", OBJECT(&chip9->xive), object_property_add_alias(obj, "xive-fabric", OBJECT(&chip9->xive),
"xive-fabric"); "xive-fabric");
object_initialize_child(obj, "psi", &chip9->psi, sizeof(chip9->psi), object_initialize_child(obj, "psi", &chip9->psi, TYPE_PNV9_PSI);
TYPE_PNV9_PSI, &error_abort, NULL);
object_initialize_child(obj, "lpc", &chip9->lpc, sizeof(chip9->lpc), object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC);
TYPE_PNV9_LPC, &error_abort, NULL);
object_initialize_child(obj, "occ", &chip9->occ, sizeof(chip9->occ), object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC);
TYPE_PNV9_OCC, &error_abort, NULL);
object_initialize_child(obj, "homer", &chip9->homer, sizeof(chip9->homer), object_initialize_child(obj, "homer", &chip9->homer, TYPE_PNV9_HOMER);
TYPE_PNV9_HOMER, &error_abort, NULL);
for (i = 0; i < PNV9_CHIP_MAX_PEC; i++) { for (i = 0; i < PNV9_CHIP_MAX_PEC; i++) {
object_initialize_child(obj, "pec[*]", &chip9->pecs[i], object_initialize_child(obj, "pec[*]", &chip9->pecs[i],
sizeof(chip9->pecs[i]), TYPE_PNV_PHB4_PEC, TYPE_PNV_PHB4_PEC);
&error_abort, NULL);
} }
/* /*
@ -1359,8 +1348,9 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
int core_id = CPU_CORE(pnv_core)->core_id; int core_id = CPU_CORE(pnv_core)->core_id;
snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id); snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
object_initialize_child(OBJECT(chip), eq_name, eq, sizeof(*eq), object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
TYPE_PNV_QUAD, &error_fatal, NULL); sizeof(*eq), TYPE_PNV_QUAD,
&error_fatal, NULL);
object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal); object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal);
object_property_set_bool(OBJECT(eq), true, "realized", &error_fatal); object_property_set_bool(OBJECT(eq), true, "realized", &error_fatal);
@ -1586,10 +1576,8 @@ static void pnv_chip_power10_instance_init(Object *obj)
{ {
Pnv10Chip *chip10 = PNV10_CHIP(obj); Pnv10Chip *chip10 = PNV10_CHIP(obj);
object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi), object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI);
TYPE_PNV10_PSI, &error_abort, NULL); object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC);
object_initialize_child(obj, "lpc", &chip10->lpc, sizeof(chip10->lpc),
TYPE_PNV10_LPC, &error_abort, NULL);
} }
static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)

View file

@ -483,8 +483,7 @@ static void pnv_psi_power8_instance_init(Object *obj)
{ {
Pnv8Psi *psi8 = PNV8_PSI(obj); Pnv8Psi *psi8 = PNV8_PSI(obj);
object_initialize_child(obj, "ics-psi", &psi8->ics, sizeof(psi8->ics), object_initialize_child(obj, "ics-psi", &psi8->ics, TYPE_ICS);
TYPE_ICS, &error_abort, NULL);
object_property_add_alias(obj, ICS_PROP_XICS, OBJECT(&psi8->ics), object_property_add_alias(obj, ICS_PROP_XICS, OBJECT(&psi8->ics),
ICS_PROP_XICS); ICS_PROP_XICS);
} }
@ -836,8 +835,7 @@ static void pnv_psi_power9_instance_init(Object *obj)
{ {
Pnv9Psi *psi = PNV9_PSI(obj); Pnv9Psi *psi = PNV9_PSI(obj);
object_initialize_child(obj, "source", &psi->source, sizeof(psi->source), object_initialize_child(obj, "source", &psi->source, TYPE_XIVE_SOURCE);
TYPE_XIVE_SOURCE, &error_abort, NULL);
} }
static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) static void pnv_psi_power9_realize(DeviceState *dev, Error **errp)

View file

@ -1727,9 +1727,9 @@ static void spapr_create_nvram(SpaprMachineState *spapr)
static void spapr_rtc_create(SpaprMachineState *spapr) static void spapr_rtc_create(SpaprMachineState *spapr)
{ {
object_initialize_child(OBJECT(spapr), "rtc", object_initialize_child_with_props(OBJECT(spapr), "rtc", &spapr->rtc,
&spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC, sizeof(spapr->rtc), TYPE_SPAPR_RTC,
&error_fatal, NULL); &error_fatal, NULL);
object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", object_property_set_bool(OBJECT(&spapr->rtc), true, "realized",
&error_fatal); &error_fatal);
object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc), object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc),

View file

@ -60,8 +60,7 @@ static void riscv_opentitan_init(MachineState *machine)
/* Initialize SoC */ /* Initialize SoC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, object_initialize_child(OBJECT(machine), "soc", &s->soc,
sizeof(s->soc), TYPE_RISCV_IBEX_SOC, TYPE_RISCV_IBEX_SOC);
&error_abort, NULL);
object_property_set_bool(OBJECT(&s->soc), true, "realized", object_property_set_bool(OBJECT(&s->soc), true, "realized",
&error_abort); &error_abort);

View file

@ -45,9 +45,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int idx,
{ {
Error *err = NULL; Error *err = NULL;
object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type);
sizeof(s->harts[idx]), cpu_type,
&error_abort, NULL);
s->harts[idx].env.mhartid = s->hartid_base + idx; s->harts[idx].env.mhartid = s->hartid_base + idx;
qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]);
object_property_set_bool(OBJECT(&s->harts[idx]), true, object_property_set_bool(OBJECT(&s->harts[idx]), true,

View file

@ -85,9 +85,7 @@ static void riscv_sifive_e_init(MachineState *machine)
int i; int i;
/* Initialize SoC */ /* Initialize SoC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_SOC);
sizeof(s->soc), TYPE_RISCV_E_SOC,
&error_abort, NULL);
object_property_set_bool(OBJECT(&s->soc), true, "realized", object_property_set_bool(OBJECT(&s->soc), true, "realized",
&error_abort); &error_abort);

View file

@ -328,9 +328,7 @@ static void sifive_u_machine_init(MachineState *machine)
int i; int i;
/* Initialize SoC */ /* Initialize SoC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC);
sizeof(s->soc), TYPE_RISCV_U_SOC,
&error_abort, NULL);
object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", object_property_set_uint(OBJECT(&s->soc), s->serial, "serial",
&error_abort); &error_abort);
object_property_set_bool(OBJECT(&s->soc), true, "realized", object_property_set_bool(OBJECT(&s->soc), true, "realized",
@ -486,9 +484,7 @@ static void sifive_u_soc_instance_init(Object *obj)
MachineState *ms = MACHINE(qdev_get_machine()); MachineState *ms = MACHINE(qdev_get_machine());
SiFiveUSoCState *s = RISCV_U_SOC(obj); SiFiveUSoCState *s = RISCV_U_SOC(obj);
object_initialize_child(obj, "e-cluster", &s->e_cluster, object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUSTER);
sizeof(s->e_cluster), TYPE_CPU_CLUSTER,
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0);
sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus",
@ -498,9 +494,7 @@ static void sifive_u_soc_instance_init(Object *obj)
qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0);
qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU);
object_initialize_child(obj, "u-cluster", &s->u_cluster, object_initialize_child(obj, "u-cluster", &s->u_cluster, TYPE_CPU_CLUSTER);
sizeof(s->u_cluster), TYPE_CPU_CLUSTER,
&error_abort, NULL);
qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1);
sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus",

View file

@ -3230,8 +3230,9 @@ void virtio_instance_init_common(Object *proxy_obj, void *data,
{ {
DeviceState *vdev = data; DeviceState *vdev = data;
object_initialize_child(proxy_obj, "virtio-backend", vdev, vdev_size, object_initialize_child_with_props(proxy_obj, "virtio-backend", vdev,
vdev_name, &error_abort, NULL); vdev_size, vdev_name, &error_abort,
NULL);
qdev_alias_all_properties(vdev, proxy_obj); qdev_alias_all_properties(vdev, proxy_obj);
} }

View file

@ -781,7 +781,7 @@ int object_set_propv(Object *obj,
void object_initialize(void *obj, size_t size, const char *typename); void object_initialize(void *obj, size_t size, const char *typename);
/** /**
* object_initialize_child: * object_initialize_child_with_props:
* @parentobj: The parent object to add a property to * @parentobj: The parent object to add a property to
* @propname: The name of the property * @propname: The name of the property
* @childobj: A pointer to the memory to be used for the object. * @childobj: A pointer to the memory to be used for the object.
@ -801,12 +801,13 @@ void object_initialize(void *obj, size_t size, const char *typename);
* If the object implements the user creatable interface, the object will * If the object implements the user creatable interface, the object will
* be marked complete once all the properties have been processed. * be marked complete once all the properties have been processed.
*/ */
void object_initialize_child(Object *parentobj, const char *propname, void object_initialize_child_with_props(Object *parentobj,
const char *propname,
void *childobj, size_t size, const char *type, void *childobj, size_t size, const char *type,
Error **errp, ...) QEMU_SENTINEL; Error **errp, ...) QEMU_SENTINEL;
/** /**
* object_initialize_childv: * object_initialize_child_with_propsv:
* @parentobj: The parent object to add a property to * @parentobj: The parent object to add a property to
* @propname: The name of the property * @propname: The name of the property
* @childobj: A pointer to the memory to be used for the object. * @childobj: A pointer to the memory to be used for the object.
@ -817,10 +818,31 @@ void object_initialize_child(Object *parentobj, const char *propname,
* *
* See object_initialize_child() for documentation. * See object_initialize_child() for documentation.
*/ */
void object_initialize_childv(Object *parentobj, const char *propname, void object_initialize_child_with_propsv(Object *parentobj,
const char *propname,
void *childobj, size_t size, const char *type, void *childobj, size_t size, const char *type,
Error **errp, va_list vargs); Error **errp, va_list vargs);
/**
* object_initialize_child:
* @parent: The parent object to add a property to
* @propname: The name of the property
* @child: A precisely typed pointer to the memory to be used for the
* object.
* @type: The name of the type of the object to instantiate.
*
* This is like
* object_initialize_child_with_props(parent, propname,
* child, sizeof(*child), type,
* &error_abort, NULL)
*/
#define object_initialize_child(parent, propname, child, type) \
object_initialize_child_internal((parent), (propname), \
(child), sizeof(*(child)), (type))
void object_initialize_child_internal(Object *parent, const char *propname,
void *child, size_t size,
const char *type);
/** /**
* object_dynamic_cast: * object_dynamic_cast:
* @obj: The object to cast. * @obj: The object to cast.

View file

@ -524,19 +524,21 @@ void object_initialize(void *data, size_t size, const char *typename)
object_initialize_with_type(data, size, type); object_initialize_with_type(data, size, type);
} }
void object_initialize_child(Object *parentobj, const char *propname, void object_initialize_child_with_props(Object *parentobj,
const char *propname,
void *childobj, size_t size, const char *type, void *childobj, size_t size, const char *type,
Error **errp, ...) Error **errp, ...)
{ {
va_list vargs; va_list vargs;
va_start(vargs, errp); va_start(vargs, errp);
object_initialize_childv(parentobj, propname, childobj, size, type, errp, object_initialize_child_with_propsv(parentobj, propname,
vargs); childobj, size, type, errp, vargs);
va_end(vargs); va_end(vargs);
} }
void object_initialize_childv(Object *parentobj, const char *propname, void object_initialize_child_with_propsv(Object *parentobj,
const char *propname,
void *childobj, size_t size, const char *type, void *childobj, size_t size, const char *type,
Error **errp, va_list vargs) Error **errp, va_list vargs)
{ {
@ -577,6 +579,15 @@ out:
error_propagate(errp, local_err); error_propagate(errp, local_err);
} }
void object_initialize_child_internal(Object *parent,
const char *propname,
void *child, size_t size,
const char *type)
{
object_initialize_child_with_props(parent, propname, child, size, type,
&error_abort, NULL);
}
static inline bool object_property_is_child(ObjectProperty *prop) static inline bool object_property_is_child(ObjectProperty *prop)
{ {
return strstart(prop->type, "child<", NULL); return strstart(prop->type, "child<", NULL);