ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
Needed for changing qemu_cpu_kick() argument type to CPUState and for moving halted field into CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
parent
e5ab30a2e6
commit
a096124571
55
hw/ppc.c
55
hw/ppc.c
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@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int level)
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}
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/* PowerPC 6xx / 7xx internal IRQ controller */
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static void ppc6xx_set_irq (void *opaque, int pin, int level)
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static void ppc6xx_set_irq(void *opaque, int pin, int level)
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{
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CPUPPCState *env = opaque;
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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int cur_level;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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@ -151,17 +152,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
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}
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}
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void ppc6xx_irq_init (CPUPPCState *env)
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void ppc6xx_irq_init(CPUPPCState *env)
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{
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env,
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
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PPC6xx_INPUT_NB);
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}
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#if defined(TARGET_PPC64)
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/* PowerPC 970 internal IRQ controller */
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static void ppc970_set_irq (void *opaque, int pin, int level)
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static void ppc970_set_irq(void *opaque, int pin, int level)
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{
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CPUPPCState *env = opaque;
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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int cur_level;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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@ -233,16 +237,19 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
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}
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}
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void ppc970_irq_init (CPUPPCState *env)
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void ppc970_irq_init(CPUPPCState *env)
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{
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env,
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
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PPC970_INPUT_NB);
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}
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/* POWER7 internal IRQ controller */
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static void power7_set_irq (void *opaque, int pin, int level)
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static void power7_set_irq(void *opaque, int pin, int level)
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{
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CPUPPCState *env = opaque;
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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env, pin, level);
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@ -266,17 +273,20 @@ static void power7_set_irq (void *opaque, int pin, int level)
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}
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}
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void ppcPOWER7_irq_init (CPUPPCState *env)
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void ppcPOWER7_irq_init(CPUPPCState *env)
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{
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env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, env,
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
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POWER7_INPUT_NB);
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}
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#endif /* defined(TARGET_PPC64) */
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/* PowerPC 40x internal IRQ controller */
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static void ppc40x_set_irq (void *opaque, int pin, int level)
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static void ppc40x_set_irq(void *opaque, int pin, int level)
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{
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CPUPPCState *env = opaque;
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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int cur_level;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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@ -346,16 +356,19 @@ static void ppc40x_set_irq (void *opaque, int pin, int level)
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}
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}
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void ppc40x_irq_init (CPUPPCState *env)
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void ppc40x_irq_init(CPUPPCState *env)
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{
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
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env, PPC40x_INPUT_NB);
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cpu, PPC40x_INPUT_NB);
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}
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/* PowerPC E500 internal IRQ controller */
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static void ppce500_set_irq (void *opaque, int pin, int level)
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static void ppce500_set_irq(void *opaque, int pin, int level)
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{
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CPUPPCState *env = opaque;
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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int cur_level;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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@ -407,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin, int level)
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}
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}
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void ppce500_irq_init (CPUPPCState *env)
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void ppce500_irq_init(CPUPPCState *env)
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{
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PowerPCCPU *cpu = ppc_env_get_cpu(env);
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env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
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env, PPCE500_INPUT_NB);
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cpu, PPCE500_INPUT_NB);
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}
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/*****************************************************************************/
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/* PowerPC time base and decrementer emulation */
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