target-sparc: implement sun4v RTC
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
This commit is contained in:
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3390537b5d
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a0e893039c
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@ -1098,6 +1098,12 @@ F: hw/nvram/chrp_nvram.c
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F: include/hw/nvram/chrp_nvram.h
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F: include/hw/nvram/chrp_nvram.h
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F: tests/prom-env-test.c
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F: tests/prom-env-test.c
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sun4v RTC
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M: Artyom Tarasenko <atar4qemu@gmail.com>
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S: Maintained
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F: hw/timer/sun4v-rtc.c
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F: include/hw/timer/sun4v-rtc.h
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Subsystems
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Subsystems
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----------
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----------
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Audio
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Audio
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@ -34,3 +34,5 @@ obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
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common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o
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common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o
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common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o
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common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o
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common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
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102
hw/timer/sun4v-rtc.c
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102
hw/timer/sun4v-rtc.c
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@ -0,0 +1,102 @@
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/*
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* QEMU sun4v Real Time Clock device
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*
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* The sun4v_rtc device (sun4v tod clock)
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*
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* Copyright (c) 2016 Artyom Tarasenko
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*
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* This code is licensed under the GNU GPL v3 or (at your option) any later
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* version.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "qemu/timer.h"
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#include "hw/timer/sun4v-rtc.h"
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//#define DEBUG_SUN4V_RTC
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#ifdef DEBUG_SUN4V_RTC
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#define DPRINTF(fmt, ...) \
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do { printf("sun4v_rtc: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while (0)
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#endif
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#define TYPE_SUN4V_RTC "sun4v_rtc"
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#define SUN4V_RTC(obj) OBJECT_CHECK(Sun4vRtc, (obj), TYPE_SUN4V_RTC)
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typedef struct Sun4vRtc {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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} Sun4vRtc;
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static uint64_t sun4v_rtc_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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uint64_t val = qemu_clock_get_ms(QEMU_CLOCK_REALTIME) / 1000;
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if (!(addr & 4ULL)) {
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/* accessing the high 32 bits */
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val >>= 32;
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}
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DPRINTF("read from " TARGET_FMT_plx " val %lx\n", addr, val);
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return val;
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}
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static void sun4v_rtc_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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DPRINTF("write 0x%x to " TARGET_FMT_plx "\n", (unsigned)val, addr);
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}
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static const MemoryRegionOps sun4v_rtc_ops = {
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.read = sun4v_rtc_read,
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.write = sun4v_rtc_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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void sun4v_rtc_init(hwaddr addr)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qdev_create(NULL, TYPE_SUN4V_RTC);
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s = SYS_BUS_DEVICE(dev);
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qdev_init_nofail(dev);
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sysbus_mmio_map(s, 0, addr);
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}
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static int sun4v_rtc_init1(SysBusDevice *dev)
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{
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Sun4vRtc *s = SUN4V_RTC(dev);
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memory_region_init_io(&s->iomem, OBJECT(s), &sun4v_rtc_ops, s,
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"sun4v-rtc", 0x08ULL);
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sysbus_init_mmio(dev, &s->iomem);
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return 0;
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}
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static void sun4v_rtc_class_init(ObjectClass *klass, void *data)
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{
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = sun4v_rtc_init1;
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}
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static const TypeInfo sun4v_rtc_info = {
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.name = TYPE_SUN4V_RTC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(Sun4vRtc),
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.class_init = sun4v_rtc_class_init,
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};
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static void sun4v_rtc_register_types(void)
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{
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type_register_static(&sun4v_rtc_info);
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}
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type_init(sun4v_rtc_register_types)
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1
include/hw/timer/sun4v-rtc.h
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1
include/hw/timer/sun4v-rtc.h
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@ -0,0 +1 @@
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void sun4v_rtc_init(hwaddr addr);
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