hw/arm/exynos: Move DRAM initialization next boards
Before QOM-ifying the Exynos4 SoC model, move the DRAM initialization from exynos4210.c to exynos4_boards.c because DRAM is board specific, not SoC. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -160,13 +160,11 @@ static uint64_t exynos4210_calc_affinity(int cpu)
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return mp_affinity;
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}
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Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
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unsigned long ram_size)
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Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
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{
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int i, n;
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Exynos4210State *s = g_new(Exynos4210State, 1);
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qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
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unsigned long mem_size;
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DeviceState *dev;
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SysBusDevice *busdev;
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ObjectClass *cpu_oc;
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@ -299,22 +297,6 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
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memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR,
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&s->iram_mem);
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/* DRAM */
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mem_size = ram_size;
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if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
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memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
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mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_fatal);
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vmstate_register_ram_global(&s->dram1_mem);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
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&s->dram1_mem);
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mem_size = EXYNOS4210_DRAM_MAX_SIZE;
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}
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memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
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&error_fatal);
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vmstate_register_ram_global(&s->dram0_mem);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
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&s->dram0_mem);
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/* PMU.
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* The only reason of existence at the moment is that secondary CPU boot
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* loader uses PMU INFORM5 register as a holding pen.
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@ -22,6 +22,7 @@
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "qemu-common.h"
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#include "cpu.h"
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@ -56,6 +57,12 @@ typedef enum Exynos4BoardType {
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EXYNOS4_NUM_OF_BOARDS
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} Exynos4BoardType;
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typedef struct Exynos4BoardState {
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Exynos4210State *soc;
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MemoryRegion dram0_mem;
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MemoryRegion dram1_mem;
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} Exynos4BoardState;
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static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 0xD33,
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[EXYNOS4_BOARD_SMDKC210] = 0xB16,
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@ -96,9 +103,34 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
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}
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}
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static Exynos4210State *exynos4_boards_init_common(MachineState *machine,
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static void exynos4_boards_init_ram(Exynos4BoardState *s,
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MemoryRegion *system_mem,
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unsigned long ram_size)
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{
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unsigned long mem_size = ram_size;
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if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
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memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
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mem_size - EXYNOS4210_DRAM_MAX_SIZE,
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&error_fatal);
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vmstate_register_ram_global(&s->dram1_mem);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
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&s->dram1_mem);
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mem_size = EXYNOS4210_DRAM_MAX_SIZE;
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}
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memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
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&error_fatal);
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vmstate_register_ram_global(&s->dram0_mem);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
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&s->dram0_mem);
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}
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static Exynos4BoardState *
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exynos4_boards_init_common(MachineState *machine,
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Exynos4BoardType board_type)
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{
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Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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if (smp_cpus != EXYNOS4210_NCPUS && !qtest_enabled()) {
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@ -127,8 +159,12 @@ static Exynos4210State *exynos4_boards_init_common(MachineState *machine,
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machine->kernel_cmdline,
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machine->initrd_filename);
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return exynos4210_init(get_system_memory(),
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exynos4_boards_init_ram(s, get_system_memory(),
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exynos4_board_ram_size[board_type]);
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s->soc = exynos4210_init(get_system_memory());
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return s;
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}
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static void nuri_init(MachineState *machine)
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@ -140,11 +176,11 @@ static void nuri_init(MachineState *machine)
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static void smdkc210_init(MachineState *machine)
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{
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Exynos4210State *s = exynos4_boards_init_common(machine,
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Exynos4BoardState *s = exynos4_boards_init_common(machine,
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EXYNOS4_BOARD_SMDKC210);
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lan9215_init(SMDK_LAN9118_BASE_ADDR,
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qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)]));
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qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
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arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
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}
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@ -93,8 +93,6 @@ typedef struct Exynos4210State {
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MemoryRegion iram_mem;
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MemoryRegion irom_mem;
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MemoryRegion irom_alias_mem;
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MemoryRegion dram0_mem;
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MemoryRegion dram1_mem;
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MemoryRegion boot_secondary;
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MemoryRegion bootreg_mem;
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I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
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@ -103,8 +101,7 @@ typedef struct Exynos4210State {
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void exynos4210_write_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info);
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Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
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unsigned long ram_size);
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Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
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/* Initialize exynos4210 IRQ subsystem stub */
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qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);
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