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linux-user/host/arm: Populate host_signal.h

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Split host_signal_pc and host_signal_write out of user-exec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-09-17 10:34:42 -07:00
parent 8b5bd46193
commit a30bfaa7bd
2 changed files with 31 additions and 45 deletions
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45
accel/tcg/user-exec.c
View file

@ -253,50 +253,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
return size ? g2h(env_cpu(env), addr) : NULL;
}
#if defined(__arm__)
#if defined(__NetBSD__)
#include <ucontext.h>
#include <sys/siginfo.h>
#endif
int cpu_signal_handler(int host_signum, void *pinfo,
void *puc)
{
siginfo_t *info = pinfo;
#if defined(__NetBSD__)
ucontext_t *uc = puc;
siginfo_t *si = pinfo;
#else
ucontext_t *uc = puc;
#endif
unsigned long pc;
uint32_t fsr;
int is_write;
#if defined(__NetBSD__)
pc = uc->uc_mcontext.__gregs[_REG_R15];
#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
pc = uc->uc_mcontext.gregs[R15];
#else
pc = uc->uc_mcontext.arm_pc;
#endif
#ifdef __NetBSD__
fsr = si->si_trap;
#else
fsr = uc->uc_mcontext.error_code;
#endif
/*
* In the FSR, bit 11 is WnR, assuming a v6 or
* later processor. On v5 we will always report
* this as a read, which will fail later.
*/
is_write = extract32(fsr, 11, 1);
return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask);
}
#elif defined(__aarch64__)
#if defined(__aarch64__)
#if defined(__NetBSD__)

31
linux-user/host/arm/host-signal.h
View file

@ -1 +1,30 @@
#define HOST_SIGNAL_PLACEHOLDER
/*
* host-signal.h: signal info dependent on the host architecture
*
* Copyright (c) 2003-2005 Fabrice Bellard
* Copyright (c) 2021 Linaro Limited
*
* This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
* See the COPYING file in the top-level directory.
*/
#ifndef ARM_HOST_SIGNAL_H
#define ARM_HOST_SIGNAL_H
static inline uintptr_t host_signal_pc(ucontext_t *uc)
{
return uc->uc_mcontext.arm_pc;
}
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
/*
* In the FSR, bit 11 is WnR, assuming a v6 or
* later processor. On v5 we will always report
* this as a read, which will fail later.
*/
uint32_t fsr = uc->uc_mcontext.error_code;
return extract32(fsr, 11, 1);
}
#endif