e1000: document ICS read behaviour
Add code comment to clarify the reason we set ICS with ICR: the reason was previously undocumented and git log confused rather than clarified the comments. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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hw/e1000.c
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hw/e1000.c
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@ -237,7 +237,17 @@ set_interrupt_cause(E1000State *s, int index, uint32_t val)
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val |= E1000_ICR_INT_ASSERTED;
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}
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s->mac_reg[ICR] = val;
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/*
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* Make sure ICR and ICS registers have the same value.
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* The spec says that the ICS register is write-only. However in practice,
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* on real hardware ICS is readable, and for reads it has the same value as
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* ICR (except that ICS does not have the clear on read behaviour of ICR).
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*
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* The VxWorks PRO/1000 driver uses this behaviour.
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*/
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s->mac_reg[ICS] = val;
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qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0);
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}
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