target/riscv: Tell gdbstub the correct number of CSRs
If the number of registers reported to the gdbstub code does not match the number in the associated XML file, then the register numbers used by the stub may get out of sync with a remote GDB instance. Signed-off-by: Jonathan Behrens <jonathan@fintelia.io> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -384,7 +384,7 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)
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}
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}
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gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,
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gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,
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4096, "riscv-32bit-csr.xml", 0);
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240, "riscv-32bit-csr.xml", 0);
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#elif defined(TARGET_RISCV64)
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#elif defined(TARGET_RISCV64)
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if (env->misa & RVF) {
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if (env->misa & RVF) {
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gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,
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gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu,
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@ -392,6 +392,6 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)
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}
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}
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gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,
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gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr,
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4096, "riscv-64bit-csr.xml", 0);
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240, "riscv-64bit-csr.xml", 0);
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#endif
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#endif
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}
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}
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