Emit and use adhoc function descriptor for code_gen_prologue on PPC64
Thus avoiding fragile inline assembly hackery to call into generated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -773,6 +773,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
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void tcg_target_qemu_prologue (TCGContext *s)
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void tcg_target_qemu_prologue (TCGContext *s)
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{
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{
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int i, frame_size;
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int i, frame_size;
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uint64_t addr;
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frame_size = 0
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frame_size = 0
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+ 8 /* back chain */
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+ 8 /* back chain */
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@ -786,6 +787,12 @@ void tcg_target_qemu_prologue (TCGContext *s)
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;
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;
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frame_size = (frame_size + 15) & ~15;
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frame_size = (frame_size + 15) & ~15;
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/* First emit adhoc function descriptor */
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addr = (uint64_t) s->code_ptr + 24;
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tcg_out32 (s, addr >> 32); tcg_out32 (s, addr); /* entry point */
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s->code_ptr += 16; /* skip TOC and environment pointer */
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/* Prologue */
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tcg_out32 (s, MFSPR | RT (0) | LR);
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tcg_out32 (s, MFSPR | RT (0) | LR);
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tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff));
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tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff));
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for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
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for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
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@ -796,10 +803,11 @@ void tcg_target_qemu_prologue (TCGContext *s)
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)
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)
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);
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);
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tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20));
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tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20));
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tcg_out32 (s, STD | RS (2) | RA (1) | (frame_size + 40));
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tcg_out32 (s, MTSPR | RS (3) | CTR);
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tcg_out32 (s, MTSPR | RS (3) | CTR);
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tcg_out32 (s, BCCTR | BO_ALWAYS);
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tcg_out32 (s, BCCTR | BO_ALWAYS);
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/* Epilogue */
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tb_ret_addr = s->code_ptr;
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tb_ret_addr = s->code_ptr;
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for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
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for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
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@ -810,7 +818,6 @@ void tcg_target_qemu_prologue (TCGContext *s)
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)
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)
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);
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);
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tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20));
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tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20));
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tcg_out32 (s, LD | RT (2) | RA (1) | (frame_size + 40));
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tcg_out32 (s, MTSPR | RS (0) | LR);
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tcg_out32 (s, MTSPR | RS (0) | LR);
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tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
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tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
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tcg_out32 (s, BCLR | BO_ALWAYS);
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tcg_out32 (s, BCLR | BO_ALWAYS);
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17
tcg/tcg.h
17
tcg/tcg.h
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@ -413,24 +413,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2);
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uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
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uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
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extern uint8_t code_gen_prologue[];
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extern uint8_t code_gen_prologue[];
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#ifdef __powerpc__
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#if defined(__powerpc__) && !defined(__powerpc64__)
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#ifdef __powerpc64__
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#define tcg_qemu_tb_exec(tb_ptr) \
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({ unsigned long p; \
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asm volatile ( \
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"mtctr %1\n\t" \
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"mr 3,%2\n\t" \
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"bctrl\n\t" \
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"mr %0,3\n\t" \
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: "=r" (p) \
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: "r" (code_gen_prologue), "r" (tb_ptr) \
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: "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \
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p; \
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})
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#else
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#define tcg_qemu_tb_exec(tb_ptr) \
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#define tcg_qemu_tb_exec(tb_ptr) \
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((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
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((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
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#endif
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#else
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#else
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#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
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#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
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#endif
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#endif
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