s390x/mmu: Drop debug logging from MMU code
Let's get it out of the way to make some further refactorings easier. Personally, I've never used these debug statements at all. And if I had to debug issues, I used plain GDB instead (debug prints are just way too much noise in the MMU). We might want to introduce tracing at some point instead, so we can able selected events on demand. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
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@ -28,31 +28,6 @@
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#include "hw/hw.h"
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#include "hw/s390x/storage-keys.h"
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/* #define DEBUG_S390 */
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/* #define DEBUG_S390_PTE */
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/* #define DEBUG_S390_STDOUT */
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#ifdef DEBUG_S390
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#ifdef DEBUG_S390_STDOUT
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#define DPRINTF(fmt, ...) \
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do { fprintf(stderr, fmt, ## __VA_ARGS__); \
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if (qemu_log_separate()) qemu_log(fmt, ##__VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) \
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do { qemu_log(fmt, ## __VA_ARGS__); } while (0)
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#endif
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#else
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#define DPRINTF(fmt, ...) \
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do { } while (0)
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#endif
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#ifdef DEBUG_S390_PTE
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#define PTE_DPRINTF DPRINTF
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#else
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#define PTE_DPRINTF(fmt, ...) \
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do { } while (0)
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#endif
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/* Fetch/store bits in the translation exception code: */
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#define FS_READ 0x800
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#define FS_WRITE 0x400
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@ -80,8 +55,6 @@ static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr,
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tec = vaddr | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) | 4 | asc >> 46;
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DPRINTF("%s: trans_exc_code=%016" PRIx64 "\n", __func__, tec);
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if (!exc) {
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return;
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}
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@ -97,8 +70,6 @@ static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr,
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tec = vaddr | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) | asc >> 46;
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DPRINTF("%s: trans_exc_code=%016" PRIx64 "\n", __func__, tec);
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if (!exc) {
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return;
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}
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@ -162,7 +133,6 @@ static int mmu_translate_pte(CPUS390XState *env, target_ulong vaddr,
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target_ulong *raddr, int *flags, int rw, bool exc)
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{
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if (pt_entry & PAGE_INVALID) {
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DPRINTF("%s: PTE=0x%" PRIx64 " invalid\n", __func__, pt_entry);
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trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw, exc);
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return -1;
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}
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@ -175,9 +145,6 @@ static int mmu_translate_pte(CPUS390XState *env, target_ulong vaddr,
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}
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*raddr = pt_entry & ASCE_ORIGIN;
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PTE_DPRINTF("%s: PTE=0x%" PRIx64 "\n", __func__, pt_entry);
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return 0;
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}
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@ -197,7 +164,6 @@ static int mmu_translate_segment(CPUS390XState *env, target_ulong vaddr,
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if ((st_entry & SEGMENT_ENTRY_FC) && (env->cregs[0] & CR0_EDAT)) {
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/* Decode EDAT1 segment frame absolute address (1MB page) */
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*raddr = (st_entry & 0xfffffffffff00000ULL) | (vaddr & 0xfffff);
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PTE_DPRINTF("%s: SEG=0x%" PRIx64 "\n", __func__, st_entry);
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return 0;
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}
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@ -205,8 +171,6 @@ static int mmu_translate_segment(CPUS390XState *env, target_ulong vaddr,
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origin = st_entry & SEGMENT_ENTRY_ORIGIN;
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offs = (vaddr & VADDR_PX) >> 9;
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pt_entry = ldq_phys(cs->as, origin + offs);
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PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " => 0x%016" PRIx64 "\n",
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__func__, origin, offs, pt_entry);
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return mmu_translate_pte(env, vaddr, asc, pt_entry, raddr, flags, rw, exc);
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}
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@ -223,17 +187,12 @@ static int mmu_translate_region(CPUS390XState *env, target_ulong vaddr,
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PGM_REG_SEC_TRANS, PGM_REG_FIRST_TRANS
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};
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PTE_DPRINTF("%s: 0x%" PRIx64 "\n", __func__, entry);
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origin = entry & REGION_ENTRY_ORIGIN;
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offs = (vaddr >> (17 + 11 * level / 4)) & 0x3ff8;
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new_entry = ldq_phys(cs->as, origin + offs);
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PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " => 0x%016" PRIx64 "\n",
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__func__, origin, offs, new_entry);
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if ((new_entry & REGION_ENTRY_INV) != 0) {
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DPRINTF("%s: invalid region\n", __func__);
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trigger_page_fault(env, vaddr, pchks[level / 4], asc, rw, exc);
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return -1;
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}
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@ -252,7 +211,6 @@ static int mmu_translate_region(CPUS390XState *env, target_ulong vaddr,
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offs = (vaddr >> (28 + 11 * (level - 4) / 4)) & 3;
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if (offs < ((new_entry & REGION_ENTRY_TF) >> 6)
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|| offs > (new_entry & REGION_ENTRY_LENGTH)) {
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DPRINTF("%s: invalid offset or len (%lx)\n", __func__, new_entry);
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trigger_page_fault(env, vaddr, pchks[level / 4 - 1], asc, rw, exc);
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return -1;
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}
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@ -289,8 +247,6 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
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break;
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case ASCE_TYPE_REGION2:
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if (vaddr & 0xffe0000000000000ULL) {
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DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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" 0xffe0000000000000ULL\n", __func__, vaddr);
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trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc);
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return -1;
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}
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@ -301,8 +257,6 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
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break;
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case ASCE_TYPE_REGION3:
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if (vaddr & 0xfffffc0000000000ULL) {
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DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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" 0xfffffc0000000000ULL\n", __func__, vaddr);
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trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc);
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return -1;
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}
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@ -313,8 +267,6 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
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break;
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case ASCE_TYPE_SEGMENT:
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if (vaddr & 0xffffffff80000000ULL) {
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DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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" 0xffffffff80000000ULL\n", __func__, vaddr);
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trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc);
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return -1;
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}
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@ -449,15 +401,12 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
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switch (asc) {
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case PSW_ASC_PRIMARY:
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PTE_DPRINTF("%s: asc=primary\n", __func__);
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asce = env->cregs[1];
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break;
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case PSW_ASC_HOME:
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PTE_DPRINTF("%s: asc=home\n", __func__);
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asce = env->cregs[13];
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break;
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case PSW_ASC_SECONDARY:
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PTE_DPRINTF("%s: asc=secondary\n", __func__);
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asce = env->cregs[7];
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break;
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case PSW_ASC_ACCREG:
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