target/arm: Remove floatX_maybe_silence_nan from conversions
This is now handled properly by the generic softfloat code. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -466,7 +466,6 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState *env)
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set_float_rounding_mode(float_round_to_zero, &tstat);
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set_float_exception_flags(0, &tstat);
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r = float64_to_float32(a, &tstat);
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r = float32_maybe_silence_nan(r, &tstat);
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exflags = get_float_exception_flags(&tstat);
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if (exflags & float_flag_inexact) {
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r = make_float32(float32_val(r) | 1);
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@ -11348,20 +11348,12 @@ FLOAT_CONVS(ui, d, 64, u)
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/* floating point conversion */
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float64 VFP_HELPER(fcvtd, s)(float32 x, CPUARMState *env)
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{
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float64 r = float32_to_float64(x, &env->vfp.fp_status);
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/* ARM requires that S<->D conversion of any kind of NaN generates
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* a quiet NaN by forcing the most significant frac bit to 1.
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*/
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return float64_maybe_silence_nan(r, &env->vfp.fp_status);
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return float32_to_float64(x, &env->vfp.fp_status);
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}
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float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
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{
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float32 r = float64_to_float32(x, &env->vfp.fp_status);
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/* ARM requires that S<->D conversion of any kind of NaN generates
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* a quiet NaN by forcing the most significant frac bit to 1.
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*/
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return float32_maybe_silence_nan(r, &env->vfp.fp_status);
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return float64_to_float32(x, &env->vfp.fp_status);
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}
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/* VFP3 fixed point conversion. */
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