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target/mips: Convert Rel6 Special2 opcode to decodetree

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Special2 opcode have been removed from the Release 6.

Add a single decodetree entry for all the opcode class,
triggering Reserved Instruction if ever used.

Remove unreachable check_insn_opc_removed() call.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201208203704.243704-7-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-11-24 15:17:25 +01:00
parent 0e9524af2d
commit aac357ec89
3 changed files with 9 additions and 2 deletions
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2
target/mips/mips32r6.decode
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@ -15,3 +15,5 @@
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2

7
target/mips/rel6_translate.c
View file

@ -18,6 +18,13 @@
#include "decode-mips32r6.c.inc"
#include "decode-mips64r6.c.inc"
bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
{
gen_reserved_instruction(ctx);
return true;
}
static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
{
return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);

2
target/mips/translate.c
View file

@ -27136,8 +27136,6 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
int rs, rt, rd;
uint32_t op1;
check_insn_opc_removed(ctx, ISA_MIPS_R6);
rs = (ctx->opcode >> 21) & 0x1f;
rt = (ctx->opcode >> 16) & 0x1f;
rd = (ctx->opcode >> 11) & 0x1f;